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SL6609A 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc

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SL6609A
ZARLINK
Zarlink Semiconductor Inc ZARLINK
SL6609A Datasheet PDF : 20 Pages
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OPERATION OF SL6609A
The SL6609A is a Direct Converson Receiver designed for
use up to 470MHz. It is available in a 28 pin SSOP package
and it integrates all the facilities required for the conversion of
an RF FSK signal to a base-band data signal.
Low Noise Amplifier
To achieve optimum performance it is necessary to
incorporate a Low Noise RF Amplifier at the front end of the
receiver. This is easily biased using the on chip voltage and
current sources provided.
All voltages and current sources used for bias of the RF
amplifier, receiver and mixers should be RF decoupled using
suitable capacitors (see Fig.4 for a suitable Low-Noise-
Amplifier).
Local Oscillator
The Local Oscillator signal is applied to the device in phase
quadrature. This can be achieved with the use of two RC
networks operating at the -3dB/45° transfer characteristic,
giving a full 90° phase differential between the LO ports of the
device. Each LO port of the device also requires an equal level
of drive from the Oscillator. (see Fig.5).
SL6609A
Gyrator Filters
The on chip filters include an adjustable gyrator filter. This
may be adjusted with the use of an additional resistor between
Pin 4 and GND. This allows flexibility of filter characterstics
and also allows for compensation for possible process
variations.
Audio AGC
The Audio AGC fundamentally consists of a current sink
which is controlled by the audio (baseband data) signal. It has
three parameters that may be controlled by the user. These
are the Attack (turn on) time, Decay (duration) time and
Threshold level (see Figs.6 and 7). See Application note for
details.
Regulator
The on chip regulator must be used in conjunction with a
suitable PNP transistor to achieve regulation. As the
transistor forms part of the regulator feedback loop the
transistor should exhibit the following characteristics:-
HFE > = 100 for VCE > = 0.1V
Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Pin Name
TPX
RFIADJ
LOY
GYRI
LOX
VR
TPY
GTHADJ
TCADJ
BEC
BATTFL
TPLIMY
VCC2
DATAOP
TPLIMX
BRF2
BRF1
DIG GND
VBG
VBATT
VCC1
REGCNT
VREG
MIXB
GND
MIXA
IRFAMP
IAGCOUT
Pin Description
X channel pre-gyrator filter test-point. This can be used for input and output
RF current source adjustment pin
LO input channel Y
Gyrator current adjust pin
LO input channel X
VREF 1.0 V internal signal ground
Y channel pre-gyrator filter test point, input or output
Audio AGC gain and threshold adjust. RSSI signal indicator
Audio AGC time constant adjust
Battery economy control
Battery flag output
Y channel limiter (post gyrator filter) test point, output only
Supply connection
Data output pin
X channel limiter (post gyrator filter) test point, output only
Bit rate filter 2, input to data output stage
Bit rate filter 1, output from detector
Digital ground
Bandgap voltage output
Battery flag input voltage
Supply connection
1V regulator control external PNP drive
1V regulator output voltage
Mixer input B
Ground
Mixer input A
Current source for external LNA. Value of current output will decrease at high mixer
input signal levels due to RF AGC
Audio AGC output current
5

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