SP8854E 데이터 시트보기 (PDF) - Zarlink Semiconductor Inc
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SP8854E Datasheet PDF : 14 Pages
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SP8854E Preliminary Information
INPUT
VCC
40k 40k 5k 5k
50µA
0V
Fig. 7a 16-bit input bus, FPD/FREF enable, control
direction, reference divider inputs and strobe
C-LOCK DETECT
(HIGH WHEN LOCKED)
18
3k 3k
VCC
VREF
4·7V
4k
325
VCC
325
13
RF INPUT
14
RF INPUT
500 500
3mA
3k
0V
Fig. 7b RF inputs
VCC
2·5k 2·5k
LOCK DETECT OUTPUT
(LOW WHEN LOCKED)
3k
3k
17
20µA
100µA
0V
Fig. 7c Lock detect decouple
RSET
19
VCC
CHARGE PUMP
CURRENT SOURCES
130
0V
Fig. 7e RSET pin
400µA
100
100 1k 1k
0V
Fig. 7d Lock detect output
VCC
450
450
f UP
f UP
f DN
83
83
VCC
20
OUTPUT
21
REFERENCE
f DN
2mA
0V
Fig. 7f Charge pump circuit
Figure 7 - Interface circuit diagrams
8
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