SPT7610SIQ 데이터 시트보기 (PDF) - Cadeka Microcircuits LLC.

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SPT7610SIQ

6-BIT, 1 GSPS FLASH A/D CONVERTER

Cadeka Microcircuits LLC. 

Figure 1 – Timing Diagram

1 nsec

N+1

N

VIN

N+2

N+5

N+3

N+4

CLK (1 GHz)

tdrA

DRA

DRA

todA

Data Bank A

N–2

N

N+2

OutputA Skew

(toskA)

todB

DOA–DRA Delay

(todrA)

tdrB

DRB

DRB

Data Bank B

N–3

N–1

OutputB Skew

(toskB)

N+1

DOB–DRB Delay

(todrB)

Figure 2 – Test Mode Timing Diagram

POWER FIRST

ON RISING EDGE

1

7

8

9

2

6

VIN

3

4

5

10

11

CLK IN

TEST

LOGIC LOW

ADC (Normal Operation)

DRA

tdr

tsu

TEST MODE

ADC (Normal Operation)

NDRA

tod

OUTPUT

BANK A

INVALID DATA

INVALID DATA

1

(DA0-6)

DRB

tdr

NDRB

OUTPUT

BANK B

(DB0-6)

INVALID DATA

tod

INVALID DATA

Bank A Test Pattern 1:

- Even Bits = Hi

- Odd Bits = Low

Bank A Test Pattern 2:

- Even Bits = Low

- Odd Bits = Hi

7

9

Bank B Test Pattern 1:

Bank B Test Pattern 2:

2

- Even Bits = Hi

- Even Bits = Low

8

- Odd Bits = Low

- Odd Bits = Hi

SPT7610

5

1/21/02

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