T431616A 데이터 시트보기 (PDF) - Taiwan Memory Technology

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T431616A

1M x 16 SDRAM 512K x 16bit x 2Banks Synchronous DRAM

Taiwan Memory Technology 

tm TE

CH

T431616A

MODE REGISTER

11 10 9 8 7 6 5 4 3 2 1 0

00001

JEDEC Standard Test Set (refresh counter test)

11 10 9 8 7 6 5 4

xx100

LTMODE

3 210

WT

BL

Burst Read and Single Write (for Write Through Cache)

11 10

98

1

7654

0

3 210

Use in future

11 10 9 8 7 6 5 4 3 2 1 0

x x x 1 1 v v v v v v v Vender Specific

11 10 9 8 7 6 5 4 3 2 1 0

00000

LTMODE WT

BL

Mode Register Set

v = Valid

x = Don’t care

Burst length

Wrap type

Bit2-0

000

001

010

011

100

101

110

111

0

1

WT=0

1

2

4

8

R

R

R

Full page

WT=1

1

2

4

8

R

R

R

R

Sequential

Interleave

Mode Register Write Timing

Latency mode

Bit6-4

000

001

010

011

100

101

110

111

CAS Latency

R

R

2

3

R

R

R

R

Remark R : Reserved

CLOCK

CKE

CS

RAS

CAS

WE

A0-A11

Taiwan Memory Technology, Inc. reserves the right P.11

to change products or specifications without notice.

Publication Date: DEC. 2000

Revision: C

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