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ICS650-05 데이터 시트보기 (PDF) - Integrated Circuit Systems

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ICS650-05
ICST
Integrated Circuit Systems ICST
ICS650-05 Datasheet PDF : 4 Pages
1 2 3 4
PRELIMINARY INFORMATION
ICS650-05
HDTV Clock Synthesizer
Description
The ICS650-05 is a low cost, low jitter, high
performance clock synthesizer designed to
produce 74.175824 MHz and 74.250000 MHz as
necessary for HDTV applications. Using our
patented analog Phase-Locked Loop (PLL)
techniques, the device uses a 27.0 MHz clock or
fundamental crystal input to produce buffered,
fixed clocks and a selectable frame rate clock for
HDTV systems.
Features
• Packaged in 20 pin tiny SSOP (QSOP)
• Input Frequency of 27.0 MHz
• Zero ppm synthesis error in output clocks
• Provides fixed 13.5 MHz, dual 27.0 MHz, and
54.0 MHz output clocks with a selectable Frame
Rate Clock of 74.175824 MHz or
74.250000 MHz
• Ideal for HDTV applications
• 3.3 V or 5.0 V operating voltage
Block Diagram
FRS
27.0 MHz
Clock
Synthesis
and
Control
Circuit
Input
Buffer/Crystal
Oscillator
Output
Buffer
Output
Buffer
Output
Buffers
Output
Buffers
Output
Buffer
FRCLK
54.0 MHz
13.5 MHz
27.0 MHz
27.0 MHz
OE (all outputs)
MDS 650-05 A
1
Revision 081199
Printed 12/4/00
Integrated Circuit Systems • 525 Race Street • San Jose •CA•95126• (408) 295-9800tel • (408) 295-9818fax

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