XE3005 데이터 시트보기 (PDF) - Semtech Corporation

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XE3005

Low-Power Audio CODEC

Semtech Corporation 

XE3005/XE3006

The above illustration is valid for either the SMAD output as a result of AIN/SDO or for the SMDA output as a

function of AOUT/SDI.

2.1.10 Start-up and Initialization

The CODEC generates its own power on reset signal after a power supply is connected to the VDD pin. The reset signal

is made available for the user at the pin NRESET. The rising edge of the NRESET indicates that the startup sequence of

the CODEC has finished. In most applications the NRESET pin can be left open.

The NRESET signal generated by the CODEC is used to initialize the various blocks in the device and guarantees a

correct start-up of the circuit. The start-up sequence that is automatically carried out upon power-up of the device is listed

below and illustrated in Figure 10.

1. NRESET is low (0V) when the device is not powered and remains low for a short time when VDD (upper curve in

Figure 10) is applied. The low state sustains while VDD, VREG16, VREF are stabilizing.

2. As soon as the MCLK signal is present, a counter is activated that counts 221 periods of the MCLK. After this

moment the NRESET is in the high state (VDD).

VDD = 1.8..3.3V

VREG16 = 1.6V

VREF = 1.2V

time

MCLK

NRESET

...

977 ms (MCLK=2.048KHz)

main reset

Figure 11: Startup sequence and NRESET signal after power-on.

The user can use the NRESET pin in 3 different ways and combinations:

© Semtech 2005

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