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ZXLD1100 데이터 시트보기 (PDF) - Diodes Incorporated.

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ZXLD1100 Datasheet PDF : 16 Pages
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ZXLD1100
ELECTRICAL CHARACTERISTICS (at VIN = 3V, Tamb = 25°C unless otherwise stated(1))
SYMBOL PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
VIN
Input voltage
IIN
Supply current
Quiescent
2.5
5.5 V
VEN = VIN, ILX = 0,
Output not switching
60 100 A
VFB
IFB
fLX
TOFF
TON
ILXpk
RLX
ILX(leak)
VOUT
Shutdown
FB pin control voltage
FB pin input current
Operating frequency
LX output 'OFF' time
LX output 'ON' time (2)
Switch peak current limit
Switch 'On' resistance
Switch leakage current
Controller output voltage
VEN = 0V
L=10H, VOUT =10V,
IOUT=20mA
L=10H, VOUT =10V,
IOUT=20mA
VLX =20V
Normal operation
VSENSE pin
open-circuit or
grounded
500 nA
90.5
109.5 mV
100 nA
0.35 1 MHz
350 500
ns
5
µs
320
mA
1.5
1
µA
28
V
VOUT(MAX)
Controller output voltage with output
open circuit (3)
VSENSE connected to
Vout
25
30
V
VENH
VENL
IENL
IENH
TEN(hold)
EN pin High level Input voltage
EN pin Low level Input voltage
EN pin Low level input current
EN pin High level input current
EN pin turn off delay (4)
Device active
Device in shutdown
VEN =0V
VEN =VIN
VEN switched from
high to low
1.5
VIN
V
0.4 V
-100 nA
1
A
120
µs
T/T
fLPF
PWM duty cycle range at ‘EN’ input for
filtered PWM control (5)
Internal PWM low pass filter cut-off
frequency
10kHz < f < 100kHz,
VENH =VIN
20
100 %
4
kHz
ALPF
Filter attenuation
f=30kHz
52.5
dB
NOTES:
(1) Production testing of the device is performed at 25°C. Functional operation of the device over a -40°C to +85°C temperature range is
guaranteed by design, characterization and process control.
(2) Nominal 'on' time (TONnom) is defined by the input voltage (VIN), coil inductance (L) and peak current (ILXpkdc) according to the expression:
TONnom = {ILX(pkdc) x L/VIN} +200ns.
(3) When using the open circuit protection feature, the maximum output voltage under normal operation should be maintained below the
minimum value specified, in order to prevent possible disturbance of the current control loop.
(4) This is the time for which the device remains active after the EN pin has been asserted low. This delay is necessary to allow the output to be
maintained during dc PWM mode operation.
(5) The minimum PWM signal frequency during this mode of operation is to ensure that the device remains active during PWM control. This
provides a continuous dc output current. For lower frequencies, the device will be gated 'on' and 'off' during PWM control.
(6) The maximum PWM signal frequency during this mode of operation should be kept as low as possible to minimize errors due to the turn-off
delay of the device (see Enable pin turn-off delay).
ISSUE 4 - JULY 2004
3
SEMICONDUCTORS

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