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AS5SS256K18 데이터 시트보기 (PDF) - Austin Semiconductor

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AS5SS256K18 Datasheet PDF : 13 Pages
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Austin Semiconductor, Inc.
SSRAM
AS5SS256K18
AC TEST CONDITIONS
Input pulse levels
Input rise and fall times
Input timing reference levels
Output reference levels
Output load
VIH = (VDD/2.2) + 1.5V
VIL = (VDD/2.2) - 1.5V
1ns
VDD/2.2
VDDQ/2.2
See Figures 1 and 2
LOAD DERATING CURVES
ASI’s 256K x 18 Synchronous Burst SRAM timing is dependent upon
the capacitive loading on the outputs.
OUTPUT LOADS
DQ
Z0=50
50
Vt = 1.5V
Fig. 1 OUTPUT LOAD EQUIVALENT
3.3v
SNOOZE MODE
SNOOZE MODE is a low-current, “power-down” mode in which the
device is deselected and current is reduced to ISB2Z. The duration of
SNOOZE MODE is dictated by the length of time ZZ is in a HIGH
state. After the device enters SNOOZE MODE, all inputs except ZZ
become gated inputs and are ignored.
ZZ is an asynchronous, active HIGH input that causes the device to
enter SNOOZE MODE. When ZZ becomes a logic HIGH, ISB2Z is
guaranteed after the setup time tZZ is met. Any READ or WRITE
operation pending when the device enters SNOOZE MODE is not
quaranteed to complete successfully. Therefore, SNOOZE MODE
must not be initiated until valid pending operations are completed.
DQ
351
317
5 pF
Fig. 2 OUTPUT LOAD EQUIVALENT
SNOOZE MODE ELECTRICAL CHARACTERISTICS
DESCRIPTION
CONDITIONS SYM
MIN
MAX
Current during SNOOZE MODE ZZ > VIH
ISB2Z
10
ZZ active to input ignored
tZZ
tKC
ZZ inactive to input sampled
tRZZ
tKC
ZZ active to snooze current
tZZI
tKC
ZZ inactive to exit snooze current
NOTE: 1. This parameter is sampled.
tRZZI
0
SNOOZE MODE WAVEFORM
UNITS
mA
ns
ns
ns
ns
NOTES
1
1
1
1
AS5SS256K18
Rev. 2.0 12/00
CLK
ZZ
ISUPPLY
ALL INPUTS*
tZZ
tZZI
ISB2
* Except ZZ
tRZZ
11112222333311114444222255553333444455556666777788881111t999911112222R002222333300Z4444Z5555I
1111222233334444Don’t Care
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
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