PS21661-RZ/-FR 데이터 시트보기 (PDF) - MITSUBISHI ELECTRIC
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PS21661-RZ/-FR Datasheet PDF : 10 Pages
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MITSUBISHI SEMICONDUCTOR <Single-In-Line Package Intelligent Power Module>
PS21661-RZ /FR
TRANSFER-MOLD TYPE
INSULATED TYPE
Fig. 9 TYPICAL SIP-IPM APPLICATION CIRCUIT EXAMPLE
M
5V line
R3
R2 C2 VUFB
C1 U(VUFS)
VN1
C3
UP
UN
R2
C2 VVFB
C1 V(VVFS)
VN1
C3
VP
VN
R2
C2 VWFB
C1 W(VWFS)
VN1
C3
VNC
WP
WN
FO
IC1
VCC
VB
COM HO
PIN
VS
NIN
LO
FO
CIN VNO
IC2
VCC
VB
COM HO
PIN
VS
NIN
LO
FO
CIN VNO
IC3
VCC
VB
COM HO
PIN
VS
NIN
LO
FO
CIN VNO
CIN
15V line
SIP-IPM
P
N
A
CIN R1
C4
N1
Note 1 : Input signal lines are pulled-down with 4.7kΩ (min.) internal resistor. If these input lines are susceptible to noise, an RC coupling at
each input is recommended. Input signal voltage is determined by the values of internal pull-down resistor and the external connected
resistor. Set the external resistance value so that input signal voltage exceeds the on-threshold voltage. To prevent the input signals
oscillation, the wiring of each input should be as short as possible.
2 : By virtue of integrating the specific type HVIC inside the module, direct coupling to CPU terminals without any opto-coupler or trans-
former isolation is possible.
3 : FO output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately
1kΩ resistance.
4 : Approximately a 0.1~2µF by-pass capacitor should be used across each power supply connection terminals.
5 : To prevent errors of the protection function, the wiring of A should be as short as possible.
6 : Each capacitor should be located as close to the pins of the SIP-IPM as possible.
7 : In the recommended protection circuit, please select the R1C4 time constant in the range of 1.5~2µs.
8 : To prevent surge destruction, the wiring between the smoothing capacitor and the P&N1 pins should be as short as possible. Approxi-
mately a 0.1~0.22µF snubber capacitor between the P&N1 pins is recommended.
Mar. 2004
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