HSP50415EVAL1(2000) 데이터 시트보기 (PDF) - Intersil

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HSP50415EVAL1
(Rev.:2000)

Wideband Programmable Modulator (WPM)

Intersil 

Functional Block Diagram

CE

WR

RD

RESET

ADDR<2:0>

CDATA<7:0>

INTREQ

µP

INTERFACE

DIN<15:0>

ISTRB

DATACLK

TXEN

FEMPT

FOVRFL

FFULL

I

DATA

INTERFACE/

FIFO

Q

2XSYMCLK

X2

x2, 4, 8, 16 I GAIN

x2

INTERPOLATION

INTERPOLATION

CONST.

MAP

FIR

BYPASS

Q GAIN

HALFBAND

BYPASS

CARRIER

NCO

x2 TO > 8192

INTERPOLATION COS

SIN

I GAIN I OFFSET

INTERPOLATION

FILTER

BYPASS

COMPLEX

MIXER

X

SIN(X)

BYPASS

Q GAIN Q OFFSET

14

/

12-BIT

DAC

BYPASS

FIR

BYPASS

HALFBAND

BYPASS

INTERPOLATION

FILTER

BYPASS

X

SIN(X)

BYPASS

12-BIT

DAC

SYSCLK

REFCLK

PHASE FREQ.

ERROR DETECT

LOOP FILTER

SYMBOL NCO

LOCK

DETECTOR

CLK DIVIDER

÷ 1, 2, 4, 8

PHASE

FREQUENCY

DETECTOR

CHARGE PUMP

IOUT<13:0>

IOUTA

IOUTB

ICOMP1

ICOMP2

QCOMP2

QCOMP1

QOUTA

QOUTB

LOCKDET

PLLRC

REFLO

REFIO

FSADJ

SYSCLK/2

VOLTAGE REF

SYSCLK

÷2

APLL

SELECTOR

BYPASS

CLK MULTIPLIER

X 1, 2, 4, 8, 16, 32

(VCO DIVIDER)

VOLTAGE

CONTROLLED

OSCILLATOR

CLK

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