SPT7734 데이터 시트보기 (PDF) - Signal Processing Technologies
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SPT7734 Datasheet PDF : 9 Pages
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Figure 1A: Timing Diagram 1
1
ANALOG IN
CLOCK IN
SAMPLING
CLOCK
(Internal)
DATA OUTPUT
DATA VALID
3
5
9
7
INVALID
11
13
17
15
VALID
12 3 45
Figure 1B: Timing Diagram 2
CLOCK IN
tCLK
tC
tCH
tCL
DATA
OUTPUT
Data Ø
tOD
DATA
VALID
tS
Table I - Timing Parameters
Data 1
tS
tCH
DESCRIPTION
Conversion Time
Clock Period
Clock High Duty Cycle
Clock Low Duty Cycle
Clock to Output Delay (15 pF Load)
Clock to DAV
PARAMETERS
tC
tCLK
tCH
tCL
tOD
tS
Data 2
tCL
Data 3
MIN
TYP
MAX
UNITS
tCLK
ns
25
ns
40
50
60
%
40
50
60
%
17
ns
10
ns
SPT
4
SPT7734
1/27/98
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