MC68SEC000AA10 데이터 시트보기 (PDF) - Freescale Semiconductor

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MC68SEC000AA10

MC68SEC000 Microprocessor

Freescale Semiconductor 

Freescale Semiconductor, Inc.

OVERVIEW

Figure 1 is a block diagram of the MC68SEC000 embedded processor. This processor provides a 24-bit

address bus and a statically selectable 8- or 16-bit data bus, sixteen 32-bit registers, and seven interrupt

levels.

PREFETCH/

DECODE

EXECUTION

UNIT

BUS

CONTROLLER

24-BIT ADDRESS BUS

16-BIT DATA BUS

CONTROL

Figure 1. Block Diagram of MC68SEC000

HARDWARE/SOFTWARE COMPATIBILITY

The MC68SEC000 embedded processor is hardware compatible with the MC68EC000, object-code

compatible with the MC68EC000, and upward compatible with all members of the M68000 Family. Object-

code compatibility with the M68000 enables code written for the MC68SEC000 to be migrated without

modification to any member of the M68000 Family.

LOW-POWER MODE

The MC68SEC000 provides static low-power operation. While in low-power mode, power consumption is

reduced to its quiescent value while maintaining the internal state of the processor. The recommended

method for placing the MC68SEC000 into low-power mode is described in Addendum to M68000 8-/16-/32-

Bit Microprocessor Users Manual, M68000 UMAD/AD.

SIGNAL DESCRIPTION

Figure 2 shows the functional signal groups for the MC68SEC000. These groups are briefly described in

the following paragraphs.

MOTOROLA

MC68SEC000 PRODUCT INFORMATION

3

For More Information On This Product,

Go to: www.freescale.com

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