IMSA110 데이터 시트보기 (PDF) - STMicroelectronics
부품명
상세내역
제조사
IMSA110 Datasheet PDF : 26 Pages
| |||
IMSA110
6.4 Static scaling
This can be performed using one of two units: the
MAC array output shifter (as above), and the data
normaliser. In the second case the data undergoes
a simple scaling operation (with rounding) within
the normaliser. The normaliser can be used to scale
(multiply) the data by the factors 0, 1/16384,
1/8192, 1/4096 ..., 1/2, 1, 2, 4. By controlling the
normaliser from the control bits BCR3[7-3], this
provides a means for simple scaling of the data
before it is output. Setting BCR3[1] and BCR2[6,7]
to zero ensures that the data transformation unit
takes no part in the operation and the output of the
normaliser is passed unchanged to the output pins.
6.5 Dynamic scaling
In this mode the scaling is controlled by the data
itself. i.e. the scalar is controlled from the LUT
(Ybus bits 26-22) by setting BCR3[2] to one, the
Ybus input to the output adder being set to zero
either by setting BCR3[1] to zero or programming
the LUT accordingly. This mode can provide a
discontinuous non-linear transformation.
6.6 Simple transformation
This mode allows the user to apply arbitrary trans-
formations to the data before it is output. Here the
LUT is treated as 256 by 8, addressed as either
-128 to 127 if PosLUTAddr is set to zero or 0 to 255
if PosLUTAddr is set to one. The 8 bit field selected
by the LUT prescalar is used to address a byte in
the LUT which is passed directly to the output pins
via one of the output multiplexers. Ybus control of
the data normaliser is disabled, BCR3[7-3] are set
out of range so as to zero the normaliser output and
the Ybus input to the output adder is set to zero by
BCR3[1]. One (or both) of the output multiplexers
are enabled and so the addressed byte from the
LUT passes straight to the cascade output pads.
Only the most significant byte of the USR and LSR
are applicable in this mode as overflows override
the byte select control and force it to select the most
significant byte.
6.7 Dynamic normalisation
In this mode the normaliser and transformation
units in the output conditioner are used together to
perform sophisticated non-linear dynamic range
compression and transformations. As in the simple
transformation case the prescalar selects an 8 bit
field anywhere within the X bus. The most signifi-
cant 6 bits, and overflows, are fed as an address to
the LUT. In this case the look up table is treated as
64+2 by 32. Bits 26 to 22 of the Y bus are used to
control the normaliser block so that the input to the
normaliser is dynamically scaled. The output of the
normaliser is then added in the output adder to the
least significant 22 bits of the Y bus (Note that only
28 bits of the 32 bit Y bus are actually used).
Thus the data is scaled, rounded, and then an offset
is added to the scaled result. Each operation can
be viewed as
output = input × scale + offset
Where scale and offset are both programmable
functions of input. One way to view this operation
is to consider that the original data range is divided
into 64 equal sized levels and in each level a
different scale and offset is applied. The scale and
offset stored in the USR and LSR would be chosen
to give the desired behaviour under overflow con-
ditions.
Note that in the case of cascade adder overflows,
the data on the X bus is invalid, so the scale here
would usually be set out of range so as to zero the
normaliser output. The offsets in the USR and LSR
would then provide the cascade output directly.
Note also that if the 5 bit scale field in the LUT is
programmed so that the normaliser always zeros
the data, then the output will correspond to the 22
bit offset field in the LUT. This can be viewed as a
coarse transformation with wide dynamic range
which is useful for applications such as image
contour emphasis and equalisation.
Figure 5 : Bit Format of Data Stored in LUT, USR and LSR
31
24 23
16 15
87
0
BYTE 3
BYTE 2
BYTE 1
BYTE 0
scale if
BCR3 [2] = 1
offset if BCR3 [0] = 1
10/26
Share Link: 