IMSA110 데이터 시트보기 (PDF) - STMicroelectronics
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IMSA110 Datasheet PDF : 26 Pages
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IMSA110
PIN CONNECTIONS
Index 1
2
3
4
5
6
7
8
9
10
A PSRIN
[6]
PSRIN
[4]
PSRIN
[2]
PSRIN PSROUT PSROUT PSROUT COUT
[1]
[1]
[2]
[5]
[0]
COUT
[1]
COUT
[6]
B
CIN
[3]
CLK
PSRIN
[7]
PSRIN PSROUT
[3]
[0]
GND
PSROUT COUT
[6]
[2]
Vcc
COUT
[7]
C
CIN
[4]
CIN
[2]
CIN
[0]
PSRIN
[5]
GND
PSROUT PSROUT COUT
[3]
[7]
[4]
GND
COUT
[9]
D Vcc
GND
CIN
[5]
CIN
[1]
PSRIN PSROUT COUT
[0]
[4]
[3]
Vcc
COUT
[8]
COUT
[10]
E
CIN
CIN
CIN
GND
GND
COUT COUT COUT COUT COUT
[8]
[6]
[7]
[5]
[11]
[12]
[13]
[14]
F
CIN
[9]
CIN
[10]
CIN
[11]
CIN
[12]
Vcc
D[6]
COUT
[16]
Vcc
GND
COUT
[15]
CIN
CIN
CIN
ADR
COUT COUT COUT
G
[13]
[15]
[17]
GND
[5]
GND
GND
[19]
[18]
[17]
H
CIN
[14]
CIN
[19]
CIN
ADR
ADR
[21]
[2]
[7]
E2
GND
Vcc
Vcc
COUT
[20]
J
CIN
[16]
CIN
[20]
RESET
ADR
[3]
ADR
[6]
E1
D[2]
D[5]
D[7]
COUT
[21]
K
CIN
[18]
ADR
[0]
ADR
[1]
ADR
[4]
ADR
[8]
W
D[0]
D[1]
D[3]
D[4]
Notes : 1. All VCC pins must be connected to the 5 Volt power supply.
2. All GND pins must be connected to ground.
1. INTRODUCTION
The IMSA110 is a single-chip reconfigurable and
cascadable subsystem suitable for many high
speed image and signal processing applications.
Apart from its powerful multiply-accumulate capa-
bility (420 MOPs), the strength of the IMSA110 lies
in its extensive programmable support for data
conditioning and transformation.
2. DESCRIPTION
The IMSA110 consists of a configurable array of
multiply-accumulators, three programmable length
1120 stage shift registers, a versatile post-process-
ing unit and a microprocessor interface for configu-
ration and control purposes. The comprehensive
on-chip facilities make a single device capable of
dealing with many image processing operations.
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