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INA3010N 데이터 시트보기 (PDF) - Integral Corp.

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INA3010N Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
INA3010
PINNING
PIN No DESIGNATION
1
X7 (IPU)
2
SSM (I)
3-6
Z0-Z3 (IPU)
7
MDATA (OP3)
8
9-13
14
15-17
18
19
20
21-27
28
DATA (OP3)
DR7-DR3 (ODN)
GND
DR2-DR0 (ODN)
OSC (I)
TP2 (I)
TP1 (I)
X0-X6 (IPU)
Vcc (I)
DESCRIPTION
sense input from key matrix
system mode selection input
sense inputs from key matrix
generated output data modulated
with 1/2 the oscillator frequency at
a 25% duty factor
generated output information
scan drivers
ground (0V)
scan drivers
oscillator input
test point 2
test point 1
sense inputs from key matrix
voltage supply
Note
(I) = input
(IPU) = input with p-channel pull-up transistor
(ODN) = output with open drain n-channel transistor
(OP3) = output 3-state
KEYBOARD INTERCONNECTION.
IN A3 0 1 0
2

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