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A6850 데이터 시트보기 (PDF) - Allegro MicroSystems

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A6850
Allegro
Allegro MicroSystems Allegro
A6850 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
A6850
Dual Channel Switch Interface IC
Output Faults
The A6850 withstands short-to-ground or short-to-battery of
the OUTPUTx pins. In the case of short-to-ground, current is
held to the current limit (IOUTPUTM).
If VOUTPUTx > (VIN + 0.7 V) during short-to-battery, the
A6850 monitors VOUTPUTx and disables the outputs. Because
the protection circuitry requires a finite amount of time to
disable the outputs, a bypass capacitor of 1 µF is necessary
on VIN. Although OUTPUTx sinks current into the A6850 in
this state, the current is bled to ground and does not charge-
up capacitors tied to VIN.
Overvoltage Protection
The A6850 has built-in overvoltage protection against a load
dump on the supply bus. In the case of a load dump, or when
VIN is connected to the battery supply bus and VIN rises
above the overvoltage threshold, VOVP , the A6850 will shut
off the outputs.
limits on the sense pin (see Electrical Characteristics table).
Sleep Mode
Low-leakage or sleep modes are required in automotive
applications to minimize battery drain when the vehicle is
parked. The A6850 enters sleep mode when both ENABLE
pins are low. In sleep mode, the internal regulators and all
other internal circuitry are disabled.
When enabling an output, the part must first come out of
sleep mode. Consequently, the wake-up time amounts to
a propagation delay before the outputs turn on. Also, the
ENABLE pins do not switch with hysteresis until the regula-
tors stabilize.
After the internal regulators stabilize, internal circuitry is
enabled and the outputs turn on, as shown in figure 1. As
long as one ENABLE pin is held high, the A6850 operates
with hysteresis.
SENSE Pin Outputs
The A6850 divides the OUTPUTx pin current by 10 and
mirrors it onto the corresponding SENSEx pin. Putting sense
resistors, RSENSE , from these pins to ground will create
a voltage that can be read by an ADC (analog-to-digital
converter). The value of RSENSE should be chosen so that
the voltage drop across the sense resistor (VRSENSE) does not
exceed the maximum voltage rating of the ADC. For further
protection of the ADC, an external clamping circuit, such
as a Zener diode, can be used to clamp any transient current
spikes that may occur on the output that would be translated
onto the SENSE pins.
The sense current is one tenth of the output current, plus an
offset current. This offset current is consistent across the
whole range of the output current. The sense current can be
calculated by the following formula:
ISENSEx = (IOUTPUTx / 10) + ISENSE(ofs) .
(5)
The sense resistor must also be chosen to meet the voltage
ENABLE
VREG
VENABLEL
> tON
RegOk
OUTPUT
Figure 1. Activation Timing Diagram. Exiting Sleep mode
via ENABLE signal to output waveform.
Allegro MicroSystems, Inc.

115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com

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