PDC500 데이터 시트보기 (PDF) - Power-One Inc.
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PDC500 Datasheet PDF : 4 Pages
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PFC500/PDC500 Series Data Sheet
PDC500 Input Specifications
PARAMETER
Input Voltage - DC
Low Voltage Protection
Hold-up Time
Input Current
Input Protection
Inrush Surge Current
CONDITIONS/DESCRIPTION
Continuous input range. Full power at 42-75 VDC.
Derate linearly from 40 VDC to 36 VDC, 400W.
Lowest DC input voltage.
At full load over DC input range.
48 VDC at full rated load.
Non-user serviceable internally located fuse.
Vin = 75 VDC, cold thermistor.
MIN
NOM
MAX
UNITS
36
75
VDC
34
VDC
17
ms
14
ADC
TBD
APK
Output Specifications (PFC500 and PDC500)
PARAMETER
Efficiency
Minimum loads
Ripple and Noise
Output Power
Overshoot / Undershoot
Regulation
Transient Response
Turn-on Delay
Turn-on Rise Time
CONDITIONS/DESCRIPTION
Full rated load, 110 VAC (PFC500)/ 48VDC (PDC500).
PFC/PDC500-1024
PFC500-1028
PFC500-1048
Full load, 20 MHz bandwidth.
300 LFM forced air cooling required for operation. See optional fan.
Continuous power, multiple output models. PDC500 requires derating below
42 VDC; see PDC500 input specifications.
Output voltage overshoot/undershoot at turn-on.
Without connection of remote sense.
PFC/PDC500-1024
PFC500-1028
PFC500-1048
Recovery time, to within 1% of initial set point due to a 50-100% load change,
3% max. deviation.
Time required for initial output voltage stabilization.
Time required for output voltage to rise from 10% to 90%.
MIN
NOM
MAX
75
0.6
0.6
1.2
See Model Selection Charts
500
UNITS
%
Amps
Watts
0
V
0.8
0.7
%
1.0
1
ms
1
Sec
10
ms
Interface Signals and Internal Protection (PFC500 and PDC500)
PARAMETER
Overvoltage Protection
Overload Protection
Overtemperature Protection
Remote Sense
Current Share
Inhibit
Input Power
Fail Warning
Power Good
Fan Voltage
CONDITIONS/DESCRIPTION
MIN
NOM
MAX
PFC/PDC500-1024 27.0
30.7
PFC500-1028
32.0
35.0
PFC500-1048
60.0
70.0
Fully protected against output overload and short circuit. Automatic recovery upon removal of overload condition.
System shutdown due to excessive internal temperature, automatic reset.
Total voltage compensation for cable losses with respect to the main output.
250
Accuracy of shared current with up to 6 parallel units.
10
TTL compatible logic signal will inhibit outputs by the application of a logic low signal.
An open circuit or external TTL high signal allows normal operation.
TTL compatible logic signal. Time before regulation dropout due to
4
loss of input power at 110 VAC.
TTL compatible signal. Signal is low if main output is greater
or less than 10% of nominal. For models without the
“D” option, internal pull-up resistor is 1k⍀Ͼ For “D” option,
pull-up resistor is 475⍀. See Apps Note #P1 for details.
PFC/PDC500-1024
PFC500-1028
PFC500-1048
22.08
25.20
44.20
27.36
30.80
54.72
Provides 170mA current to user supplied fan if fan option is not selected.
12
UNITS
V
mV
%
ms
V
V
AUG 01, 2003 revised to JUL 13, 2006
Page 2 of 4
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