UDA1334ATS 데이터 시트보기 (PDF) - NXP Semiconductors.
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UDA1334ATS Datasheet PDF : 22 Pages
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NXP Semiconductors
Low power audio DAC with PLL
Product specification
UDA1334ATS
8.6 Feature settings
8.6.1 DIGITAL INTERFACE FORMAT SELECT
The digital audio interface formats (see Fig.5) can be
selected via pins SFOR1 and SFOR0 as shown in
Table 4.
For the digital audio interface holds that the
BCK frequency can be maximum 64 times WS frequency.
The WS signal must change at the negative edge of the
BCK signal for all digital audio formats.
Table 4 Data format selection
SFOR1
LOW
LOW
HIGH
HIGH
SFOR0
LOW
HIGH
LOW
HIGH
INPUT FORMAT
I2S-bus input
LSB-justified 16 bits input
LSB-justified 20 bits input
LSB-justified 24 bits input
8.6.2 DE-EMPHASIS CONTROL
This function is only available in audio mode. In that case,
pin DEEM/CLKOUT can be used to activate the digital
de-emphasis for 44.1 kHz as given in Table 5.
Table 5 De-emphasis control (audio mode)
DEEM/CLKOUT
LOW
HIGH
FUNCTION
de-emphasis off
de-emphasis on
8.6.3 MUTE CONTROL
The output signal can be soft muted by setting pin MUTE
to HIGH as given in Table 6.
Table 6 Mute control
MUTE
LOW
HIGH
FUNCTION
mute off
mute on
2000 Jul 31
9
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