DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

MAX17605(2017) 데이터 시트보기 (PDF) - Maxim Integrated

부품명
상세내역
제조사
MAX17605
(Rev.:2017)
MaximIC
Maxim Integrated MaximIC
MAX17605 Datasheet PDF : 13 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
MAX17600–MAX17605
4A Sink/Source Current,
12ns, Dual MOSFET Drivers
Absolute Maximum Ratings
VDD, INA, INB, ENA, ENB to GND........................-0.3V to +16V
OUTA, OUTB to GND............................................-0.3V to +16V
Junction Operating Temperature Range........... -40°C to +125°C
Continuous Power Dissipation (TA = +70°C)
8-Pin TDFN (derate 23.8mW/°C above +70°C).........1904mW
8-Pin SO (derate 74mW/°C above +70°C).............. 588.2mW*
8-Pin µMAX (derate 12.9mW/°C above +70°C)......1030.9mW
*As per JEDEC 51 standard.
Operating Temperature Range.......................... -40°C to +125°C
Junction Temperature.......................................................+150°C
Storage Temperature Range............................. -65°C to +150°C
Lead Temperature (soldering, 10s).................................. +300°C
Soldering Temperature (reflow)........................................+240°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
PACKAGE TYPE: 8 TDFN
Package Code
Outline Number
Land Pattern Number
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θJA)
Junction to Case (θJC)
T833+2
21-0137
90-0059
42°C/W
8°C/W
PACKAGE TYPE: 8 SO
Package Code
Outline Number
Land Pattern Number
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θJA)
Junction to Case (θJC)
S8+2
21-0041
90-0096
136°C/W
38°C/W
PACKAGE TYPE: 8 µMAX
Package Code
Outline Number
Land Pattern Number
THERMAL RESISTANCE, FOUR-LAYER BOARD
Junction to Ambient (θJA)
Junction to Case (θJC)
U8E+2
21-0107
90-0145
77.6°C/W
5°C/W
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
www.maximintegrated.com
Maxim Integrated 2

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]