STB7N52K3(2008) 데이터 시트보기 (PDF) - STMicroelectronics

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STB7N52K3
(Rev.:2008)

N-channel 525 V, 0.84 Ω, 6.3 A, D2PAK, DPAK, TO-220FP, TO-220 SuperMESH3™ Power MOSFET

STMicroelectronics 

Electrical characteristics

STB7N52K3 - STD7N52K3 - STF7N52K3 - STP7N52K3

2

Electrical characteristics

(TC = 25 °C unless otherwise specified)

Table 5.

Symbol

On /off states

Parameter

Test conditions

V(BR)DSS

Drain-source

breakdown voltage

ID = 1 mA, VGS = 0

IDSS

IGSS

VGS(th)

RDS(on

Zero gate voltage

VDS = Max rating

drain current (VGS = 0) VDS = Max rating, TC=125 °C

Gate-body leakage

current (VDS = 0)

VGS = ± 20 V

Gate threshold voltage VDS = VGS, ID = 50 µA

Static drain-source on

resistance

VGS = 10 V, ID = 3.1 A

Min. Typ. Max. Unit

525

V

1 µA

50 µA

± 10 µA

3 3.75 4.5 V

0.84 0.98 Ω

Table 6.

Symbol

Dynamic

Parameter

Test conditions

Min. Typ. Max. Unit

gfs (1)

Forward

transconductance

VDS = 15 V, ID = 3.1 A

TBD

S

Ciss

Coss

Crss

Input capacitance

Output capacitance

Reverse transfer

capacitance

VDS = 50 V, f = 1 MHz, VGS = 0

TBD

TBD

TBD

pF

pF

pF

COSS

(1)

eq

Equivalent output

capacitance

VGS = 0, VDS = 0 to 420 V

TBD

pF

RG

Intrinsic gate

resistance

f = 1 MHz open drain

TBD

Ω

Qg

Total gate charge

VDD = 420 V, ID = 6.3 A,

Qgs Gate-source charge VGS = 10 V

Qgd Gate-drain charge

(see Figure 3)

TBD

nC

TBD

nC

TBD

nC

1. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS

increases from 0 to 80% VDSS

Table 7.

Symbol

Switching times

Parameter

td(on)

tr

td(off)

tf

Turn-on delay time

Rise time

Turn-off-delay time

Fall time

Test conditions

VDD = 262 V, ID = 3.1 A,

RG = 4.7 Ω, VGS = 10 V

(see Figure 2)

Min.

Typ.

TBD

TBD

TBD

TBD

Max Unit

ns

ns

ns

ns

4/15

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