AD7173-8 데이터 시트보기 (PDF) - Analog Devices

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AD7173-8

Low Power, 8-/16-Channel, 31.25 kSPS, 24-Bit, Highly Integrated Sigma-Delta ADC

Analog Devices 

AD7173-8

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 3

Specifications..................................................................................... 4

Timing Characteristics ................................................................ 8

Absolute Maximum Ratings............................................................ 9

Thermal Resistance ...................................................................... 9

ESD Caution.................................................................................. 9

Pin Configuration and Function Descriptions........................... 10

Typical Performance Characteristics ........................................... 12

Noise Performance and Resolution.............................................. 18

Getting Started ................................................................................ 19

Power Supplies ............................................................................ 20

Digital Communication............................................................. 20

AD7173-8 Reset........................................................................... 21

Configuration Overview ........................................................... 22

Circuit Description......................................................................... 27

Analog Input ............................................................................... 27

Reference Options ...................................................................... 29

Clock Source ............................................................................... 29

Digital Filters................................................................................... 31

Sinc5 + Sinc1 Filter..................................................................... 31

Sinc3 Filter................................................................................... 32

Single Cycle Settling ................................................................... 33

Enhanced 50 Hz and 60 Hz Rejection Filters ......................... 33

Operating Modes ............................................................................ 36

Continuous Conversion Mode ................................................. 36

Continuous Read Mode............................................................. 37

Single Conversion Mode ........................................................... 38

Standby and Power-Down Modes............................................ 39

Calibration Modes...................................................................... 39

Digital Interface .............................................................................. 40

Checksum Protection................................................................. 40

CRC Calculation......................................................................... 41

Data Sheet

Integrated Functions ...................................................................... 43

General-Purpose I/O ................................................................. 43

External Multiplexer Control ................................................... 43

Delay ............................................................................................ 43

16-Bit/24-Bit Conversions......................................................... 43

Serial Interface Reset (DOUT_RESET) .................................. 43

Synchronization.......................................................................... 43

Error Flags ................................................................................... 44

DATA_STAT ............................................................................... 44

IOSTRENGTH Bit ..................................................................... 44

Grounding and Layout .................................................................. 45

Register Summary .......................................................................... 46

Register Details ............................................................................... 48

Communications Register......................................................... 48

Status Register............................................................................. 50

ADC Mode Register................................................................... 51

Interface Mode Register ............................................................ 52

Register Check ............................................................................ 53

Data Register............................................................................... 53

GPIO Configuration Register................................................... 54

ID Register................................................................................... 55

Channel Register 0 ..................................................................... 55

Channel Register 1 to Channel Register 15 ............................ 57

Setup Configuration Register 0 ................................................ 58

Setup Configuration Register 1 to Setup Configuration

Register 7 ..................................................................................... 59

Filter Configuration Register 0................................................. 60

Filter Configuration Register 1 to Filter Configuration

Register 7 ..................................................................................... 61

Offset Register 0 ......................................................................... 62

Offset Register 1 to Offset Register 7....................................... 62

Gain Register 0............................................................................ 62

Gain Register 1 to Gain Register 7 ........................................... 62

Outline Dimensions ....................................................................... 63

Ordering Guide .......................................................................... 63

Rev. B | Page 2 of 64

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