AD7175-2 데이터 시트보기 (PDF) - Analog Devices

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AD7175-2

24-Bit, 250 kSPS, Sigma-Delta ADC with 20 µs Settling and True Rail-to-Rail Buffers

Analog Devices 

AD7175-2

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 3

Specifications..................................................................................... 4

Timing Characteristics ................................................................ 7

Timing Diagrams.......................................................................... 8

Absolute Maximum Ratings............................................................ 9

Thermal Resistance ...................................................................... 9

ESD Caution.................................................................................. 9

Pin Configuration and Function Descriptions........................... 10

Typical Performance Characteristics ........................................... 12

Noise Performance and Resolution.............................................. 19

Getting Started ................................................................................ 20

Power Supplies ............................................................................ 21

Digital Communication............................................................. 21

AD7175-2 Reset.......................................................................... 22

Configuration Overview ........................................................... 22

Circuit Description......................................................................... 28

Buffered Analog Input ............................................................... 28

Crosspoint Multiplexer .............................................................. 28

AD7175-2 Reference .................................................................. 29

Buffered Reference Input........................................................... 30

Clock Source ............................................................................... 30

Digital Filters ................................................................................... 31

Sinc5 + Sinc1 Filter..................................................................... 31

Sinc3 Filter................................................................................... 31

Single Cycle Settling ................................................................... 32

Enhanced 50 Hz and 60 Hz Rejection Filters ......................... 36

Operating Modes ............................................................................ 39

Continuous Conversion Mode ................................................. 39

Continuous Read Mode............................................................. 40

Single Conversion Mode ........................................................... 41

Standby and Power-Down Modes............................................ 42

Calibration................................................................................... 42

Digital Interface .............................................................................. 43

Data Sheet

Checksum Protection ................................................................ 43

CRC Calculation......................................................................... 44

Integrated Functions ...................................................................... 46

General-Purpose Input/Output................................................ 46

External Multiplexer Control ................................................... 46

Delay ............................................................................................ 46

16-Bit/24-Bit Conversions......................................................... 46

DOUT_RESET ........................................................................... 46

Synchronization.......................................................................... 46

Error Flags ................................................................................... 47

DATA_STAT ............................................................................... 47

IOSTRENGTH ........................................................................... 48

Internal Temperature Sensor .................................................... 48

Grounding and Layout .................................................................. 49

Register Summary .......................................................................... 50

Register Details ............................................................................... 51

Communications Register......................................................... 51

Status Register............................................................................. 52

ADC Mode Register................................................................... 53

Interface Mode Register ............................................................ 54

Register Check ............................................................................ 55

Data Register............................................................................... 55

GPIO Configuration Register................................................... 56

ID Register................................................................................... 57

Channel Register 0 ..................................................................... 57

Channel Register 1 to Channel Register 3 .............................. 58

Setup Configuration Register 0 ................................................ 59

Setup Configuration Register 1 to Setup Configuration

Register 3 ..................................................................................... 59

Filter Configuration Register 0................................................. 60

Filter Configuration Register 1 to Filter Configuration

Register 3 ..................................................................................... 61

Offset Register 0 ......................................................................... 61

Offset Register 1 to Offset Register 3....................................... 61

Gain Register 0............................................................................ 61

Gain Register 1 to Gain Register 3 ........................................... 61

Outline Dimensions ....................................................................... 62

Ordering Guide .......................................................................... 62

Rev. B | Page 2 of 62

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