EVAL-CN0240-SDPZ 데이터 시트보기 (PDF) - Analog Devices

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EVAL-CN0240-SDPZ

Bidirectional Isolated High-Side Current Sense with 270 V Common-Mode Rejection

Analog Devices 

Circuit Note

CN-0240

1kΩ

1.25kΩ

1.25kΩ

1.25kΩ

1.25kΩ

AD8475

1kΩ

from the high common-mode voltage in the case of a fault

condition.

The code is processed in the PC by using the SDP hardware

board and LabVIEW software.

Figure 5 shows a comparison between the code seen at the

output of the ADC recorded by LabVIEW and an ideal code

calculated based on a perfect system. The plots show how the

circuit achieves an end-point linearity error of less than 0.5%

over the entire input voltage range (−100 mV to +100 mV).

The offset error and gain error can be removed using software

calibration if desired.

4000

0

NC = NO CONNECT

Figure 4. AD8475 Funnel Amplifier

As shown in Figure 1, the output common-mode voltage is set

at 2.5 V by a resistor divider driven by the ADR435 reference

output of 5 V.

The primary source of noise in the system is the output noise of

the AD629 of 15 µV p-p in the 0.1 Hz to 10 Hz bandwidth. For

a 100 mV full-scale signal, this corresponds to a noise-free code

resolution of

Noise Free Code Resolution =

log

2



100mV

15mV



=

log

2

(6666)

=

12.7

bits

The input noise of the AD8622 is only 0.2 µV p-p, which is

negligible compared to the AD629. The output noise of the

AD8475 is 2.5 µV p-p, which is also negligible at that point

where the full-scale signal level is 4 V p-p.

Notice that the power supply voltage for the AD7170 is supplied

by the isolated power output (+5.0 VISO) of the ADuM5402 quad

isolator.

The reference voltage for the AD7170 is supplied by the

ADR435 precision XFET® reference. The ADR435 has an initial

accuracy of ±0.12% (A grade), and a typical temperature

coefficient of 2 ppm/°C. The ADR435 has a wide operating

range (7.0 V to 18.0 V) and utilizes the +15.0 V rail for a

power source.

Although it is possible to operate both the AD7170 VDD and

REFIN(+) from the 5.0 V power supply, using a separate

reference provides better accuracy.

The input voltage to the AD7170 ADC is converted into an

offset binary code at the output of the ADC. The ADuM5402

provides the isolation for the DOUT data output, the SCLK

input, and the PDRST input. Although the isolator is optional,

it is recommended to protect the downstream digital circuitry

3500

–0.5

3000

–1.0

ACTUAL CODE

2500

–1.5

IDEAL CODE

2000

–2.0

1500

–2.5

1000

–3.0

ERROR =

100 × (ACTUAL CODE − IDEAL CODE) ÷ 4096

500

–3.5

0

–4.0

SHUNT VOLTAGE (mV)

Figure 5. Plot of Actual Code, Ideal Code, and %Error vs. Shunt Voltage

PCB Layout Considerations

In any circuit where accuracy is crucial, it is important to

consider the power supply and ground return layout on the

board. The PCB should isolate the digital and analog sections as

much as possible. This PCB was constructed in a 4-layer stack

up with large area ground plane layers and power plane

polygons. See the MT-031 Tutorial for more discussion on

layout and grounding and the MT-101 Tutorial for information

on decoupling techniques.

The power supply to the AD7170 and ADuM5402 should be

decoupled with 10 µF and 0.1 µF capacitors to properly suppress

noise and reduce ripple. The capacitors should be placed as

close to the device as possible with the 0.1 µF capacitor having a

low ESR value. Ceramic capacitors are advised for all high

frequency decoupling.

Care should be taken in considering the isolation gap between

the primary and secondary sides of the ADuM5402. The

EVAL-CN0240-SDPZ board maximizes this distance by pulling

back any polygons or components on the top layer and aligning

them with the pins on the ADuM5402.

Power supply lines should have as large a trace width as possible

to provide low impedance paths and reduce glitch effects on the

Rev. 0 | Page 3 of 5

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