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25L1605A 데이터 시트보기 (PDF) - Macronix International

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25L1605A
Macronix
Macronix International Macronix
25L1605A Datasheet PDF : 43 Pages
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Status Register Feature
Electronic Identification
- JEDEC 2-byte Device ID
- RES command, 1-byte Device ID
HARDWARE FEATURES
SCLK Input
- Serial clock input
• SI Input
- Serial Data Input
• SO Output
- Serial Data Output
• WP# pin
- Hardware write protection
• HOLD# pin
- pause the chip without diselecting the chip
• PACKAGE
- 16-pin SOP (300mil)
- 8-land SON (8x6mm)
- 8-pin SOP (200mil)
- All Pb-free devices are RoHS Compliant
MX25L1605A
GENERAL DESCRIPTION
The MX25L1605A is a CMOS 16,777,216 bit serial Flash memory, which is configured as 2,097,152 x 8 internally. The
MX25L1605A features a serial peripheral interface and software protocol allowing operation on a simple 3-wire bus. The
three bus signals are a clock input (SCLK), a serial data input (SI), and a serial data output (SO). SPI access to the device
is enabled by CS# input.
The MX25L1605A provides sequential read operation on whole chip.
After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified
page or sector/block locations will be executed. Program command is executed on page (256 bytes) basis, and erase
command is executes on chip or sector(4K-bytes) or block(64K-bytes).
To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read
command can be issued to detect completion status of a program or erase operation via WIP bit.
When the device is not in operation and CS# is high, it is put in standby mode and draws less than 20uA DC current.
The MX25L1605A utilizes MXIC's proprietary memory cell, which reliably stores memory contents even after 100,000
program and erase cycles.
P/N: PM1211
REV. 1.6, APR. 18, 2008
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