SPI12N50C3 데이터 시트보기 (PDF) - Infineon Technologies
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SPI12N50C3 Datasheet PDF : 13 Pages
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SPP12N50C3, SPB12N50C3
SPI12N50C3, SPA12N50C3
Electrical Characteristics, at Tj = 25 °C, unless otherwise specified
Parameter
Symbol
Conditions
Values
Unit
min. typ. max.
Characteristics
Transconductance
gfs
VDS≥2*ID*RDS(on)max,
-
8
-S
ID=7A
Input capacitance
Ciss
Output capacitance
Coss
Reverse transfer capacitance Crss
Effective output capacitance,5) Co(er)
energy related
Effective output capacitance,6) Co(tr)
time related
VGS=0V, VDS=25V,
f=1MHz
VGS=0V,
VDS=0V to 400V
- 1200 - pF
- 400 -
-
30
-
-
45
-
-
92
-
Turn-on delay time
Rise time
Turn-off delay time
Fall time
td(on)
VDD=380V, VGS=0/10V,
-
10
- ns
tr
ID=11.6A, RG=6.8Ω
-
8
-
td(off)
-
45
-
tf
-
8
-
Gate Charge Characteristics
Gate to source charge
Qgs
VDD=400V, ID=11.6A
-
5
- nC
Gate to drain charge
Qgd
-
26
-
Gate charge total
Qg
VDD=400V, ID=11.6A,
-
49
-
VGS=0 to 10V
Gate plateau voltage
V(plateau) VDD=400V, ID=11.6A
-
5
-V
1Limited only by maximum temperature
2Repetitve avalanche causes additional power losses that can be calculated as PAV=EAR*f.
3Device on 40mm*40mm*1.5mm epoxy PCB FR4 with 6cm² (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical without blown air.
4Soldering temperature for TO-263: 220°C, reflow
5Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% VDSS.
6Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS.
Rev. 2.1
Page 3
2004-03-29
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