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24C256 데이터 시트보기 (PDF) - ON Semiconductor

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24C256
ON-Semiconductor
ON Semiconductor ON-Semiconductor
24C256 Datasheet PDF : 18 Pages
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CAT24C256
Table 9. A.C. CHARACTERISTICS New Product (Rev E) (Notes 14, 15)
(VCC = 1.8 V to 5.5 V, TA = 40°C to +85°C and VCC = 2.5 V to 5.5 V, TA = 40°C to +125°C, unless otherwise specified.)
Standard
VCC = 1.8 V 5.5 V
Fast
VCC = 1.8 V 5.5 V
FastPlus
VCC = 2.5 V 5.5 V
TA = 405C to +855C
Symbol
Parameter
Min
Max
Min
Max
Min
Max
FSCL
Clock Frequency
100
400
1,000
tHD:STA
START Condition Hold Time
4
0.6
0.25
tLOW
Low Period of SCL Clock
4.7
1.3
0.45
tHIGH
High Period of SCL Clock
4
0.6
0.40
tSU:STA
START Condition Setup Time
4.7
0.6
0.25
tHD:DAT
Data In Hold Time
0
0
0
tSU:DAT
Data In Setup Time
250
100
50
tR (Note 16)
SDA and SCL Rise Time
1,000
300
100
tF (Note 16)
SDA and SCL Fall Time
300
300
100
tSU:STO
STOP Condition Setup Time
4
0.6
0.25
tBUF
Bus Free Time Between
4.7
1.3
0.5
STOP and START
tAA
SCL Low to Data Out Valid
3.5
0.9
0.40
tDH
Data Out Hold Time
50
50
50
Ti (Note 16)
Noise Pulse Filtered at SCL
50
50
50
and SDA Inputs
tSU:WP
tHD:WP
tWR
tPU
(Notes 16, 17)
WP Setup Time
WP Hold Time
Write Cycle Time
Power-up to Ready Mode
0
2.5
5
1
0
2.5
5
1
0
1
5
0.1
1
14. Test conditions according to “A.C. Test Conditions” table.
15. The New product Rev E is identified by letter “E” or a dedicated marking code on top of the package.
16. Tested initially and after a design or process change that affects this parameter.
17. tPU is the delay between the time VCC is stable and the device is ready to accept commands.
Units
kHz
ms
ms
ms
ms
ms
ns
ns
ns
ms
ms
ms
ns
ns
ms
ms
ms
ms
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