NX3DV2567(2010) 데이터 시트보기 (PDF) - NXP Semiconductors.
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NX3DV2567 Datasheet PDF : 20 Pages
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NXP Semiconductors
NX3DV2567
Low-ohmic four-pole double-throw analog switch
7.2 Pin description
Table 3. Pin description
Symbol
1Y0
2Y0, 3Y0, 4Y0
S
1Y1
2Y1, 3Y1, 4Y1
1Z
2Z, 3Z, 4Z
GND
n.c.
VCC
Pin
1
5, 9, 13
2
15
3, 7, 11
16
4, 8, 12
6
10
14
8. Functional description
Description
independent input or output (supply switch)
independent input or output (data switch)
select input
independent input or output (supply switch)
independent input or output (data switch)
common output or input (supply switch)
common output or input (data switch)
ground (0 V)
not connected
supply voltage
Table 4.
Input S
L
H
Function table[1]
[1] H = HIGH voltage level; L = LOW voltage level.
9. Limiting values
Channel on
nY0
nY1
Table 5. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min
Max
Unit
VCC
supply voltage
VI
input voltage
select input S
VSW
switch voltage
IIK
input clamping current VI < −0.5 V
ISK
switch clamping current VI < −0.5 V or VI > VCC + 0.5 V
−0.5
[1] −0.5
[2] −0.5
−50
-
+4.6
V
+4.6
V
VCC + 0.5 V
-
mA
±50
mA
ISW
switch current
supply path switch
VSW > −0.5 V or VSW < VCC + 0.5 V;
source or sink current
-
±350
mA
VSW > −0.5 V or VSW < VCC + 0.5 V;
-
±500
mA
pulsed at 1 ms duration, < 10 % duty cycle;
peak current
data path switch
VSW > −0.5 V or VSW < VCC + 0.5 V;
source or sink current
-
±128
mA
Tstg
storage temperature
−65
+150
°C
NX3DV2567
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 28 September 2010
© NXP B.V. 2010. All rights reserved.
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