CY2DL1510AZI 데이터 시트보기 (PDF) - Cypress Semiconductor

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CY2DL1510AZI

1:10 Differential LVDS Fanout Buffer

Cypress Semiconductor 

CY2DL1510

Absolute Maximum Ratings

Parameter

VDD

VIN[2]

VOUT[2]

Description

Supply voltage

Input voltage, relative to VSS

DC output or I/O Voltage, relative to VSS

TS

ESDHBM

LU

Storage temperature

Electrostatic discharge (ESD) protection

(Human body model)

Latch up

Condition

Nonfunctional

Nonfunctional

Nonfunctional

Nonfunctional

JEDEC STD 22-A114-B

UL–94

MSL

Flammability rating

Moisture sensitivity level

At 1/8 in.

Min

–0.5

–0.5

–0.5

–55

2000

Max

4.6

lesser of 4.0

or VDD + 0.4

lesser of 4.0

or VDD + 0.4

150

–

Unit

V

V

V

°C

V

Meets or exceeds JEDEC Spec

JESD78B IC latch up test

V–0

3

Operating Conditions

Parameter

VDD

Description

Supply voltage

TA

Ambient operating temperature

tPU

Power ramp time

Condition

2.5-V supply

3.3-V supply

Commercial

Industrial

Power-up time for VDD to reach

minimum specified voltage (power

ramp must be monotonic.)

Min

2.375

3.135

0

–40

0.05

Max

Unit

2.625

V

3.465

V

70

°C

85

°C

500

ms

Note

2. The voltage on any I/O pin cannot exceed the power pin during power-up. Power supply sequencing is not required.

Document Number: 001-54863 Rev. *H

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