CAT24C32WI-GT3JN 데이터 시트보기 (PDF) - ON Semiconductor
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CAT24C32WI-GT3JN Datasheet PDF : 17 Pages
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CAT24C32
Table 5. A.C. CHARACTERISTICS
(VCC = 1.8 V to 5.5 V, TA = −40°C to +125°C and VCC = 1.7 V to 5.5 V, TA = −40°C to +85°C.) (Note 6)
Symbol
FSCL
tHD:STA
tLOW
tHIGH
tSU:STA
tHD:DAT
tSU:DAT
tR (Note 7)
tF (Note 7)
tSU:STO
tBUF
Parameter
Clock Frequency
START Condition Hold Time
Low Period of SCL Clock
High Period of SCL Clock
START Condition Setup Time
Data In Hold Time
Data In Setup Time
SDA and SCL Rise Time
SDA and SCL Fall Time
STOP Condition Setup Time
Bus Free Time Between STOP
and START
Standard
VCC = 1.7 V − 5.5 V
Min
Max
100
4
4.7
4
4.7
0
250
1,000
300
4
4.7
Fast
VCC = 1.7 V − 5.5 V
Min
Max
400
0.6
1.3
0.6
0.6
0
100
300
300
0.6
1.3
Fast−Plus (Note 9)
VCC = 2.5 V − 5.5 V
TA = −405C to +855C
Min
Max
1,000
0.25
0.45
0.40
0.25
0
50
100
100
0.25
0.5
Units
kHz
ms
ms
ms
ms
ms
ns
ns
ns
ms
ms
tAA
SCL Low to Data Out Valid
3.5
0.9
0.40
ms
tDH
Data Out Hold Time
100
100
50
ns
Ti (Note 7)
Noise Pulse Filtered at SCL and
100
100
SDA Inputs
100
ns
tSU:WP
WP Setup Time
0
0
0
ms
tHD:WP
WP Hold Time
2.5
2.5
1
ms
tWR
Write Cycle Time
5
5
5
ms
tPU (Notes 7, 8) Power−up to Ready Mode
1
1
0.1
1
ms
6. Test conditions according to “A.C. Test Conditions” table.
7. Tested initially and after a design or process change that affects this parameter.
8. tPU is the delay between the time VCC is stable and the device is ready to accept commands.
9. Fast−Plus (1 MHz) speed class available for product revision “F”. The die revision “F” is identified by letter “F” or a dedicated marking code
on top of the package.
Table 6. A.C. TEST CONDITIONS
Input Drive Levels
0.2 x VCC to 0.8 x VCC
Input Rise and Fall Time
≤ 50 ns
Input Reference Levels
Output Reference Level
Output Test Load
0.3 x VCC, 0.7 x VCC
0.5 x VCC
Current Source IOL = 3 mA (VCC ≥ 2.5 V); IOL = 1 mA (VCC < 2.5 V); CL = 100 pF
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