HEF40174BP 데이터 시트보기 (PDF) - NXP Semiconductors.
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HEF40174BP Datasheet PDF : 14 Pages
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NXP Semiconductors
HEF40174B
Hex D-type flip-flop
8. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
Conditions
VDD
IIK
VI
IOK
II/O
IDD
Tstg
Tamb
Ptot
supply voltage
input clamping current
input voltage
output clamping current
input/output current
supply current
storage temperature
ambient temperature
total power dissipation
VI < 0.5 V or VI > VDD + 0.5 V
VO < 0.5 V or VO > VDD + 0.5 V
DIP16 package
SO16 package
P
power dissipation
per output
[1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 C.
[2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C.
Min
0.5
-
0.5
-
-
-
65
40
[1] -
[2] -
-
9. Recommended operating conditions
Max
Unit
+18
V
10
mA
VDD + 0.5 V
10
mA
10
mA
50
mA
+150
C
+85
C
750
mW
500
mW
100
mW
Table 5.
Symbol
VDD
VI
Tamb
t/V
Recommended operating conditions
Parameter
Conditions
supply voltage
input voltage
ambient temperature
in free air
input transition rise and fall rate
VDD = 5 V
VDD = 10 V
VDD = 15 V
10. Static characteristics
Min Typ Max
3
-
15
0
-
VDD
40 -
+85
-
-
3.75
-
-
0.5
-
-
0.08
Unit
V
V
C
s/V
s/V
s/V
Table 6. Static characteristics
VSS = 0 V; VI = VSS or VDD unless otherwise specified.
Symbol Parameter
Conditions
VDD
VIH
HIGH-level input voltage IO < 1 A
VIL
LOW-level input voltage IO < 1 A
5V
10 V
15 V
5V
10 V
15 V
Tamb = 40 C
Min Max
3.5
-
7.0
-
11.0 -
-
1.5
-
3.0
-
4.0
Tamb = 25 C
Min Max
3.5
-
7.0
-
11.0 -
-
1.5
-
3.0
-
4.0
Tamb = 85 C Unit
Min Max
3.5
-V
7.0
-V
11.0 - V
-
1.5 V
-
3.0 V
-
4.0 V
HEF40174B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 21 November 2011
© NXP B.V. 2011. All rights reserved.
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