HEF40174BP 데이터 시트보기 (PDF) - NXP Semiconductors.
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HEF40174BP Datasheet PDF : 14 Pages
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NXP Semiconductors
HEF40174B
Hex D-type flip-flop
Table 6. Static characteristics …continued
VSS = 0 V; VI = VSS or VDD unless otherwise specified.
Symbol Parameter
Conditions
VOH
HIGH-level output voltage IO < 1 A
VOL
LOW-level output voltage IO < 1 A
IOH
HIGH-level output current VO = 2.5 V
VO = 4.6 V
VO = 9.5 V
VO = 13.5 V
IOL
LOW-level output current VO = 0.4 V
VO = 0.5 V
VO = 1.5 V
II
input leakage current
IDD
supply current
IO = 0 A
CI
input capacitance
VDD
5V
10 V
15 V
5V
10 V
15 V
5V
5V
10 V
15 V
5V
10 V
15 V
15 V
5V
10 V
15 V
-
Tamb = 40 C
Min Max
4.95 -
9.95 -
14.95 -
- 0.05
- 0.05
- 0.05
- 1.7
- 0.52
- 1.3
- 3.6
0.52 -
1.3
-
3.6
-
- 0.3
-
20
-
40
-
80
-
-
Tamb = 25 C
Min Max
4.95 -
9.95 -
14.95 -
- 0.05
- 0.05
- 0.05
- 1.4
- 0.44
- 1.1
- 3.0
0.44 -
1.1
-
3.0
-
- 0.3
-
20
-
40
-
80
-
7.5
Tamb = 85 C Unit
Min Max
4.95 - V
9.95 - V
14.95 - V
- 0.05 V
- 0.05 V
- 0.05 V
- 1.1 mA
- 0.36 mA
- 0.9 mA
- 2.4 mA
0.36 - mA
0.9
- mA
2.4
- mA
- 1.0 A
-
150 A
-
300 A
-
600 A
-
- pF
11. Dynamic characteristics
Table 7. Dynamic characteristics
VSS = 0 V; Tamb = 25 C; or test circuit see Figure 5; unless otherwise specified.
Symbol Parameter
Conditions
VDD
Extrapolation formula
tPHL
HIGH to LOW
CP to Qn;
propagation delay see Figure 4
5V
10 V
48 ns + (0.55 ns/pF)CL
19 ns + (0.23 ns/pF)CL
15 V
12 ns + (0.16 ns/pF)CL
MR to Qn;
see Figure 4
5V
10 V
58 ns + (0.55 ns/pF)CL
24 ns + (0.23 ns/pF)CL
15 V
17 ns + (0.16 ns/pF)CL
tPLH
LOW to HIGH
CP to Qn;
propagation delay see Figure 4
5V
10 V
48 ns + (0.55 ns/pF)CL
19 ns + (0.23 ns/pF)CL
15 V
12 ns + (0.16 ns/pF)CL
tt
transition time
see Figure 4
5V
10 ns + (1.00 ns/pF)CL
10 V
9 ns + (0.42 ns/pF)CL
15 V
6 ns + (0.28 ns/pF)CL
tsu
set-up time
Dn to CP;
see Figure 4
5V
10 V
15 V
Min Typ Max Unit
-
75 155 ns
-
30 65 ns
-
20 45 ns
-
85 175 ns
-
35 70 ns
-
25 50 ns
-
75 155 ns
-
30 65 ns
-
20 45 ns
-
60 120 ns
-
30 60 ns
-
20 40 ns
20 10 -
ns
10 5
-
ns
10 5
-
ns
HEF40174B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 21 November 2011
© NXP B.V. 2011. All rights reserved.
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