74AHCT138PW-Q100 데이터 시트보기 (PDF) - NXP Semiconductors.

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74AHCT138PW-Q100

3-to-8 line decoder/demultiplexer; inverting

NXP Semiconductors. 

Nexperia

74AHC138-Q100; 74AHCT138-Q100

3-to-8 line decoder/demultiplexer; inverting

5. Pinning information

5.1 Pinning

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Fig 4. Pin configuration for SO16 and TSSOP16

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(1) This is not a supply pin. The substrate is attached to this

pad using conductive die attach material. There is no

electrical or mechanical requirement to solder this pad.

However, if it is soldered, the solder land should remain

floating or be connected to GND.

Fig 5. Pin configuration for DHVQFN16

5.2 Pin description

Table 2.

Symbol

A0

A1

A2

E1

E2

E3

GND

Y0 to Y7

VCC

Pin description

Pin

1

2

3

4

5

6

8

15, 14, 13, 12, 11, 10, 9, 7

16

Description

address input

address input

address input

enable input (active LOW)

enable input (active LOW)

enable input (active HIGH)

ground (0 V)

output

supply voltage

74AHC_AHCT138_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2 — 2 April 2014

© Nexperia B.V. 2017. All rights reserved

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