74HC1G125-Q100 데이터 시트보기 (PDF) - NXP Semiconductors.
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74HC1G125-Q100 Datasheet PDF : 16 Pages
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Nexperia
74HC1G125-Q100; 74HCT1G125-Q100
Bus buffer/line driver; 3-state
tW
VI 90 %
negative
pulse
VM
10 %
0V
tf
VI
positive
pulse
tr
90 %
VM
10 %
0V
tW
VM
tr
tf
VM
VI
G
VCC
VO
DUT
RT
VCC
RL S1
CL
open
001aad983
Fig 7.
Test data is given in Table 12.
Definitions for test circuit:
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator
CL = Load capacitance including jig and probe capacitance
RL = Load resistor
S1 = Test selection switch
Test circuit for measuring switching times
Table 12. Test data
Type
Input
VI
tr, tf
74HC1G125-Q100 VCC
6 ns
74HCT1G125-Q100 3 V
6 ns
Load
CL
15 pF, 50 pF
15 pF, 50 pF
RL
1 k
1 k
S1 position
tPLH, tPHL
open
open
tPZH, tPHZ
GND
GND
tPZL, tPLZ
VCC
VCC
74HC_HCT1G125_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 18 June 2013
© Nexperia B.V. 2017. All rights reserved
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