74LVC573ADB 데이터 시트보기 (PDF) - NXP Semiconductors.
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74LVC573ADB
NXP Semiconductors.
74LVC573ADB Datasheet PDF : 20 Pages
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NXP Semiconductors
74LVC573A
Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state
VI
OE input
GND
VCC
Qn output
LOW- to - OFF
OFF- to - LOW
VOL
VOH
Qn output
HIGH - to - OFF
OFF- to - HIGH
GND
VM
t PLZ
t PZL
t PHZ
VX
VY
outputs
enabled
VM
t PZH
outputs
disabled
VM
outputs
enabled
mna813
Fig 9.
Measurement points are given in Table 8.
VOL and VOH are typical output voltage levels that occur with the output load.
3-state enable and disable times
VI
Dn input
GND
VI
LE input
GND
VM
th
t su
VM
th
t su
mna814
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig 10. Data set-up and hold times for the Dn input to the LE input
Table 8. Measurement points
Supply voltage Input
VCC
1.2 V
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
VI
VCC
VCC
VCC
2.7 V
3.0 V to 3.6 V
2.7 V
VM
0.5 VCC
0.5 VCC
0.5 VCC
1.5 V
1.5 V
Output
VM
0.5 VCC
0.5 VCC
0.5 VCC
1.5 V
1.5 V
VX
VOL + 0.15 V
VOL + 0.15 V
VOL + 0.15 V
VOL + 0.3 V
VOL + 0.3 V
VY
VOH 0.15 V
VOH 0.15 V
VOH 0.15 V
VOH 0.3 V
VOH 0.3 V
74LVC573A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 19 February 2013
© NXP B.V. 2013. All rights reserved.
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