DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

MR20H40VDFR 데이터 시트보기 (PDF) - Extech Instruments Corporation.

부품명
상세내역
제조사
MR20H40VDFR
EXTECH
Extech Instruments Corporation. EXTECH
MR20H40VDFR Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Pin Functions
MR20H40 / MR25H40
Figure 3 – DFN Package Pin Diagram (Top View)
CS 1
SO 2
WP 3
VSS
4
8
VDD
7 HOLD
6 SCK
5 SI
Signal
Name
CS
SO
WP
VSS
SI
SCK
HOLD
VDD
Pin I/O
1 Input
2 Output
3 Input
4
Refer-
ence
5 Input
6 Input
7 Input
8 Supply
Table 1 – Pin Functions
Function Description
Chip Select
Serial Output
Write Protect
An active low chip select for the serial MRAM. When chip select is high, the
memory is powered down to minimize standby power, inputs are ignored
and the serial output pin is Hi-Z. Multiple serial memories can share a com-
mon set of data pins by using a unique chip select for each memory.
The data output pin is driven during a read operation and remains Hi-Z at
all other times. SO is Hi-Z when HOLD is low. Data transitions on the data
output occur on the falling edge of SCK.
A low on the write protect input prevents write operations to the Status
Register.
Ground
Power supply ground pin.
Serial Input
Serial Clock
Hold
All data is input to the device through this pin. This pin is sampled on the
rising edge of SCK and ignored at other times. SI can be tied to SO to create
a single bidirectional data bus if desired.
Synchronizes the operation of the MRAM. The clock can operate up to 50
MHz to shift commands, address, and data into the memory. Inputs are
captured on the rising edge of clock. Data outputs from the MRAM occur
on the falling edge of clock. The serial MRAM supports both SPI Mode 0
(CPOL=0, CPHA=0) and Mode 3 (CPOL=1, CPHA=1). In Mode 0, the clock is
normally low. In Mode 3, the clock is normally high. Memory operation is
static so the clock can be stopped at any time.
A low on the Hold pin interrupts a memory operation for another task.
When HOLD is low, the current operation is suspended. The device will
ignore transitions on the CS and SCK when HOLD is low. All transitions of
HOLD must occur while CS is low.
Power Supply Power supply voltage from +3.0 to +3.6 volts.
Copyright © Everspin Technologies 2014
6
MR20H40 / MR25H40 Revision 11, 8/2014

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]