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AD7703ANZ 데이터 시트보기 (PDF) - Analog Devices

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AD7703ANZ
ADI
Analog Devices ADI
AD7703ANZ Datasheet PDF : 18 Pages
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AD7703
PIN CONFIGURATION
DIP, SOIC
MODE 1
20 SDATA
CLKOUT 2
19 SCLK
CLKIN 3
18 DRDY
SC1
DGND
DVSS
AVSS
4 AD7703 17 SC2
5 TOP VIEW 16 CS
6 (Not to Scale) 15 DVDD
7
14 AVDD
AGND 8
13 CAL
AIN 9
VREF 10
12 BP/UP
11 SLEEP
Table I. Bit Weight Table (2.5 V Reference Voltage)
V LSB
0.596 0.25
1.192 0.5
2.384 1.00
4.768 2.00
9.537 4.00
Unipolar Mode
% FS
ppm
FS LSB
0.0000238 0.24 0.13
0.0000477 0.48 0.26
0.0000954 0.95 0.5
0.0001907 1.91 1.00
0.0003814 3.81 2.00
Bipolar Mode
% FS
ppm
FS
0.0000119 0.12
0.0000238 0.24
0.0000477 0.48
0.0000954 0.95
0.0001907 1.91
PIN FUNCTION DESCRIPTIONS
Pin No. Mnemonic Description
1
2
3
4, 17
5
6
7
8
9
10
11
12
13
14
15
16
18
19
20
MODE
CLKOUT
CLKIN
SC1, SC2
DGND
DVSS
AVSS
AGND
AIN
VREF
SLEEP
BP/UP
CAL
AVDD
DVDD
CS
DRDY
SCLK
SDATA
Selects the Serial Interface Mode. If MODE is tied to DGND, the Synchronous External Clocking (SEC)
mode is selected. SCLK is configured as an input, and the output appears without formatting, the MSB
coming first. If MODE is tied to +5 V, the AD7703 operates in the Synchronous Self-Clocking (SSC) mode.
SCLK is configured as an output, with a clock frequency for fCLKIN/4 and 25% duty cycle.
Clock Output to Generate an Internal Master Clock by Connecting a Crystal between CLKOUT and CLKIN.
If an external clock is used, CLKOUT is not connected.
Clock Input for External Clock.
System Calibration Pins. The state of these pins, when CAL is taken high, determines the type of calibration
performed.
Digital Ground. Ground reference for all digital signals.
Digital Negative Supply, 5 V Nominal.
Analog Negative Supply, 5 V Nominal.
Analog Ground. Ground reference for all analog signals.
Analog Input.
Voltage Reference Input, 2.5 V Nominal. This determines the value of positive full scale in the Unipolar
mode and the value of both positive and negative full scale in the Bipolar mode.
Sleep Mode Pin. When this pin is taken low, the AD7703 goes into a low power mode with typically 10 µW
power consumption.
Bipolar/Unipolar Mode Pin. When this pin is low, the AD7703 is configured for a unipolar input range going
from AGND to VREF. When Pin 12 is high, the AD7703 is configured for a bipolar input range, ±VREF.
Calibration Mode Pin. When CAL is taken high for more than four cycles, the AD7703 is reset and performs
a calibration cycle when CAL is brought low again. The CAL pin can also be used as a strobe to synchronize
the operation of several AD7703s.
Analog Positive Supply, 5 V Nominal.
Digital Positive Supply, 5 V Nominal.
Chip Select Input. When CS is brought low, the AD7703 will begin to transmit serial data in a format determined
by the state of the MODE pin.
Data Ready Output. DRDY is low when valid data is available in the output register. It goes high after trans-
mission of a word is completed. It also goes high for four clock cycles when a new data-word is being loaded
into the output register, to indicate that valid data is not available, irrespective of whether data transmission
is complete or not.
Serial Clock Input/Output. The SCLK pin is configured as an input or output, dependent on the type of
serial data transmission that has been selected by the MODE pin. When configured as an output in the
Synchronous Self-Clocking mode, it has a frequency of fCLKIN/4 and a duty cycle of 25%.
Serial Data Output. The AD7703s output data is available at this pin as a 20-bit serial word.
–6–
REV. F

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