LTM4628(RevC) 데이터 시트보기 (PDF) - Linear Technology
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LTM4628 Datasheet PDF : 36 Pages
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Typical Performance Characteristics
LTM4628
IOUT1 and IOUT2 vs Total Current
for Parallel Operation
9
IOUT1
8
IOUT2
7
6
5
4
3
2
1
0
0 2 4 6 8 10 12 14 16
TOTAL OUTPUT CURRENT (A)
4628 G16
COMP1 and COMP2
vs Output Current
1.4
VITH1
1.3
VITH2
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
01234567
OUTPUT CURRENT (A)
89
4628 G17
Pin Functions (Recommended to Use Test Points to Monitor Signal Pin Connections.)
VOUT1 (A1-A5, B1-B5, C1-C4): Power Output Pins. Apply
output load between these pins and GND pins. Recommend
placing output decoupling capacitance directly between
these pins and GND pins. Review Table 4.
GND (A6-A7, B6-B7, D1-D4, D9-D12, E1-E4, E10-E12,
F1-F3, F10-F12, G1, G3, G10, G12, H1-H7, H9-H12, J1,
J5, J8, J12, K1, K5-K8, K12, L1, L12, M1 , M12): Power
Ground Pins for Both Input and Output Returns.
VOUT2 (A8-A12, B8-B12, C9-C12): Power Output Pins.
Apply output load between these pins and GND pins. Rec-
ommend placing output decoupling capacitance directly
between these pins and GND pins. Review Table 4.
VOUTS1, VOUTS2 (C5, C8): This pin is connected to the top
of the internal top feedback resistor for each output. The
pin can be directly connected to its specific output, or
connected to DIFFOUT when the remote sense amplifier
is used. In paralleling modules, one of the VOUTS pins is
connected to the DIFFOUT pin in remote sensing or directly
to VOUT with no remote sensing. It is very important to
connect these pins to either the DIFFOUT or VOUT since
this is the feedback path, and cannot be left open. See the
Applications Information section.
fSET (C6): Frequency Set Pin. A 10µA current is sourced
from this pin. A resistor from this pin to ground sets a
voltage that in turn programs the operating frequency.
Alternatively, this pin can be driven with a DC voltage
that can set the operating frequency. See the Applications
Information section.
SGND (C7, D6, G6-G7, F6-F7): Signal Ground Pin. Return
ground path for all analog and low power circuitry. Tie a
single connection to the output capacitor GND in the ap-
plication. See layout guidelines in Figure 27.
VFB1, VFB2 (D5, D7): The Negative Input of the Error
Amplifier for Each Channel. Internally, this pin is con-
nected to VOUTS1 or VOUTS2 with a 60.4kΩ precision
resistor. Different output voltages can be programmed
with an additional resistor between VFB and GND pins. In
PolyPhase® operation, tying the VFB pins together allows
for parallel operation. See the Applications Information
section for details.
4628fc
7
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