LTM4623EY 데이터 시트보기 (PDF) - Linear Technology
부품명
상세내역
제조사
LTM4623EY Datasheet PDF : 26 Pages
| |||
LTM4623
Applications Information
to SGND. At light loads the internal current comparator
may remain tripped for several cycles and force the top
MOSFET to stay off for several cycles, thus skipping cycles.
The inductor current does not reverse in this mode.
Forced Continuous Current Mode (CCM)
In applications where fixed frequency operation is more
critical than low current efficiency, and where the lowest
output ripple is desired, forced continuous operation should
be used. Forced continuous operation can be enabled by
tying the MODE pin to INTVCC. In this mode, inductor current
is allowed to reverse during low output loads, the COMP
voltage is in control of the current comparator threshold
throughout, and the top MOSFET always turns on with each
oscillator pulse. During start-up, forced continuous mode
is disabled and inductor current is prevented from revers-
ing until the LTM4623’s output voltage is in regulation.
Operating Frequency
The operating frequency of the LTM4623 is optimized to
achieve the compact package size and the minimum out-
put ripple voltage while still keeping high efficiency. The
default operating frequency is internally set to 1MHz. In
most applications, no additional frequency adjusting is
required.
If any operating frequency other than 1MHz is required
by application, the operating frequency can be increased
by adding a resistor, RFSET, between the FREQ pin and
SGND, as shown in Figure 28. The operating frequency
can be calculated as:
f(Hz) = 1.6e11
162k || RFSET(Ω)
To reduce switching current ripple, 2MHz operating fre-
quency is required for 3.3V to 5.5V output with RFSET = 162k
to SGND.
The programmable operating frequency range is from
800kHz to 4MHz.
Frequency Synchronization and Clock In
The power module has a phase-locked loop comprised
of an internal voltage controlled oscillator and a phase
detector. This allows the internal top MOSFET turn-on
to be locked to the rising edge of the external clock. The
external clock frequency range must be within ±30%
around the set operating frequency. A pulse detection
circuit is used to detect a clock on the CLKIN pin to turn
on the phase-locked loop. The pulse width of the clock has
to be at least 100ns. The clock high level must be above
2V and clock low level below 0.3V. During the start-up of
the regulator, the phase-locked loop function is disabled.
Multiphase Operation
For output loads that demand more than 3A of current,
multiple LTM4623s can be paralleled to run out of phase
to provide more output current without increasing input
and output voltage ripples.
The CLKOUT signal can be connected to the CLKIN pin of
the following LTM4623 stage to line up both the frequency
and the phase of the entire system. Tying the PHMODE pin
to INTVCC, SGND or INTVCC/2 generates a phase differ-
ence (between CLKIN and CLKOUT) of 180°, 120°, or 90°
respectively, which corresponds to 2-phase, 3-phase or
4-phase operation. A total of 12 phases can be cascaded
to run simultaneously out of phase with respect to each
other by programming the PHMODE pin of each LTM4623
to different levels. Figure 2 shows a 4-phase design and
a 6-phase design example for clock phasing.
Table 2. PHMODE Pin Status and Corresponding Phase
Relationship (Relate to CLKIN)
PHASMD
INTVCC
SGND
INTVCC/2
CLKOUT
180°
120°
90°
The operating frequency can also be decreased by adding
a resistor between the FREQ pin and INTVCC, calculated as:
f(Hz) = 1MHz − 2.8e11
RFSET (Ω)
A multiphase power supply significantly reduces the
amount of ripple current in both the input and output ca-
pacitors. The RMS input ripple current is reduced by, and
the effective ripple frequency is multiplied by, the number
of phases used (assuming that the input voltage is greater
than the number of phases used times the output voltage).
4623fa
10
For more information www.linear.com/LTM4623
Share Link: 