74LVC544A 데이터 시트보기 (PDF) - NXP Semiconductors.
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74LVC544A Datasheet PDF : 19 Pages
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NXP Semiconductors
74LVC544A
Octal D-type registered transceiver; inverting; 3-state
6. Functional description
Table 3. Function table[1]
Operating mode
Disabled
Disabled plus latch
Latch plus display
Transparent
Hold (do nothing)
Input
OEAB, OEBA EAB, EBA
H
X
X
H
L
L
L
L
L
L
L
L
L
L
L
L
LEAB, LEBA An, Bn
X
X
X
X
L
h
L
l
h
l
L
H
L
L
H
X
Output
Bn, An
Z
Z
Z
Z
L
H
L
H
NC
[1] XX = AB for A to B direction and BA for B to A direction
H = HIGH voltage level
L = LOW voltage level
h = HIGH state must be present one set-up time before the LOW-to-HIGH transition of LEAB, LEBA, EAB and EBA
l = LOW state must be present one set-up time before the LOW-to-HIGH transition of LEAB, LEBA, EAB and EBA
X = don’t care
= LOW to HIGH level transition
NC = no change
Z = high-impedance OFF-state
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
Parameter
Conditions
Min Max
Unit
VCC
supply voltage
IIK
input clamping current
VI
input voltage
IOK
output clamping current
VO
output voltage
VI < 0 V
VO > VCC or VO < 0 V
output HIGH or LOW state
output 3-state
0.5
50
[1] 0.5
-
[2] 0.5
[2] 0.5
+6.5
V
-
mA
+6.5
V
50
mA
VCC + 0.5 V
+6.5
V
IO
output current
VO = 0 V to VCC
-
50
mA
ICC
IGND
Tstg
Ptot
supply current
ground current
storage temperature
total power dissipation
Tamb = 40 C to +125 C
-
100
mA
100 -
mA
65 +150
C
[3] -
500
mW
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SO24 packages: above 70 C the value of Ptot derates linearly with 8 mW/K.
For (T)SSOP24 packages: above 60 C the value of Ptot derates linearly with 5.5 mW/K.
74LVC544A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 18 December 2012
© NXP B.V. 2012. All rights reserved.
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