TH8060JDF 데이터 시트보기 (PDF) - Melexis Microelectronic Systems

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TH8060JDF

LIN Bus Transceiver with integrated Voltage Regulator

Melexis Microelectronic Systems  

TH8060

LIN Bus Transceiver with integrated Voltage Regulator

Functional Description

The TH8060 consists a voltage regulator 5V/100mA and

a LIN Bus transceiver, which is a bi-directional bus inter-

face device for data transfer between LIN-Bus and the

LIN protocol controller.

Also integrated into the transceiver are a voltage and

time controlled reset management, power down, wake

up function and a universal comparator for extended ap-

plications.

LIN-BUS Transceiver

The TH8060 is a bi-directional bus interface device for

data transfer between LIN-Bus and the LIN protocol

controller.

The transceiver consists a pnp-driver (1.2V@40mA) with

slew rate control and fold-back characteristic and con-

sists as well in the receiver a high voltage comparator

followed by a debouncing unit.

The BUS pin has an integrated 30k pull up resistor with a

diode, which prevent the reverse current of VBUS during

differential voltage between VSUP and BUS (VBUS>VSUP).

RxD

TxD

to wake up logic

tdebW AKE

tdebBUS

VthL

VthH

+5V

ESD

MR

TSHD

BIAS

pnp-

Control

slew rate

IB

foldback

Figure 2 - Block Diagram LIN Bus Transceiver

VSUP

30k

BUS

Transmit Mode

During the transmission the data at the pin TxD will be

transferred to the pin BUS. To minimize the electromag-

netic emission of the bus line, the TH8060 has an inte-

grated slew rate control.

TxD

VBAT

VSUP

0.8 VBAT

BUS

0.2 VBAT

VDiode

recessive

dominant

Figure 3 - Transmit Mode Pulse Diagram

Datasheet Rev 1.1 March 2001

Page 3

www.melexis.com

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