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STLC5460 데이터 시트보기 (PDF) - STMicroelectronics

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STLC5460
ST-Microelectronics
STMicroelectronics ST-Microelectronics
STLC5460 Datasheet PDF : 54 Pages
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- in the Command Register it writes the indica-
tion if insert into 64 kb/s, 32 kb/s or 16 kb/s
channel.
When the data has been inserted, status bit
(INS) of status register is put at logical 1 and an
interrupt is generated.
Extraction
Two programmable registers (Extract A and B)
contain the data extracted from two input time
slots. To perform an extraction, three registers
STLC5460
are processed by the microprocessor :
- Extract A and/or B Registers to read the data
extracted.
- The Source register to indicate the input inter-
face, PCM or GCI, and the Time Slot se-
lected.
When the data is loaded in Extract A or Ex-
tract B Register, the bit EXT of STATUS reg-
ister is put at logical 1,and an interrupt is gen-
erated.
LIST OF REGISTER
Name
MUX Mode
AD5 to AD1
(H)
RBS
IIR
00000
(00)
X
COMP
MCONF1
MCONF2
PCONF
CPOF
IPOF
OPOF
IPSH1
IPSH2
OPSH1
OPSH2
IPASS
OPASS
IMASS
OMASS
00001
00010
00011
00100
00101
00110
00111
01000
01001
01010
01011
01100
01101
01110
01111
(01)
X
(02)
X
(03)
X
(04)
X
(05)
X
(06)
X
(07)
X
(08)
X
(09)
X
(0A)
X
(0B)
X
(0C)
X
(0D)
X
(0E)
X
(0F)
X
STATUS
ECR
CMR
SRC
DST
INSA
INSB
EXTA
EXTB
INT
MASK
RMOS
TMOS
RCIS
TEST
10001
10010
10011
10100
10101
10110
10111
11000
11001
11010
11011
11100
11101
11110
11111
(11)
X
(12)
X
(13)
X
(14)
X
(15)
X
(16)
X
(17)
X
(18)
X
(19)
X
(1A)
X
(1B)
X
(1C)
X
(1D)
X
(1E)
X
(1F)
X
NB in Mux Mode AD7, AD6, AD0 and RDS bits are ignored
Read
Only
R
R
R
R
R
R
R
DEMUX Mode
A3 to A0
0000
RBS
X
0001
0
0010
0
0011
0
0100
0
0101
0
0110
0
0111
0
1000
0
1001
0
1010
0
1011
0
1100
0
1101
0
1110
0
1111
0
0001
1
0010
1
0011
1
0100
1
0101
1
0110
1
0111
1
1000
1
1001
1
1010
1
1011
1
1100
1
1101
1
1110
1
1111
1
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