MC68LC040 데이터 시트보기 (PDF) - Freescale Semiconductor
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MC68LC040 Datasheet PDF : 442 Pages
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Freescale Semiconductor, Inc.
Paragraph
Number
TABLE OF CONTENTS (Continued)
Title
Page
Number
4.1
4.2
4.3
4.3.1
4.3.1.1
4.3.1.2
4.3.2
4.3.3
4.4
4.4.1
4.4.2
4.4.3
4.4.4
4.5
4.6
4.6.1
4.6.2
4.7
4.7.1
4.7.2
Section 4
Instruction and Data Caches
Cache Operation ................................................................................... 4-2
Cache Management ................................ .............................................. 4-5
Caching Modes .....................................................................................4-6
Cachable Accesses ........................................................................... 4-6
Write-Through Mode ......................................................................4-6
Copyback Mode ............................................................................. 4-6
Cache-Inhibited Accesses ................................................................. 4-7
Special Accesses .............................................................................. 4-7
Cache Protocol ..................................................................................... 4-7
Read Miss ......................................................................................... 4-8
Write Miss .......................................................................................... 4-8
Read Hit ............................................................................................ 4-8
Write Hit ............................................................................................. 4-8
Cache Coherency ................................................................................. 4-9
Memory Accesses for Cache Maintenance........................................... 4-11
Cache Filling ................................ ...................................................... 4-11
Cache Pushes ................................................................................... 4-13
Cache Operation Summary...................................................................4-13
Instruction Cache...............................................................................4-14
Data Cache........................................................................................4-15
5.1
5.2
5.3
5.3.1
5.3.2
5.3.3
5.3.4
5.3.5
5.3.6
5.3.7
5.3.8
5.3.9
5.4
5.4.1
Section 5
Signal Description
Address Bus (A31–A0) ......................................................................... 5-4
Data Bus (D31–D0) ...............................................................................5-5
Transfer Attribute Signals......................................................................5-5
Transfer Type (TT1, TT0) .................................................................. 5-5
Transfer Modifier (TM2–TM0) ........................................................... 5-6
Transfer Line Number (TLN1, TLN0)................................................. 5-6
User-Programmable Attributes (UPA1, UPA0) .................................. 5-7
Read/Write (R/W) .............................................................................. 5-7
Transfer Size (SIZ1, SIZ0) ................................................................ 5-7
Lock (LOCK) ...................................................................................... 5-7
Lock End (LOCKE) ............................................................................ 5-7
Cache Inhibit Out (CIOUT) ................................................................ 5-8
Bus Transfer Control Signals ................................................................ 5-8
Transfer Start (TS) ............................................................................. 5-8
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M68040 USER’S MANUAL
MOTOROLA
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