74ABT00 데이터 시트보기 (PDF) - NXP Semiconductors.

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74ABT00

Quad 2-input NAND gate

NXP Semiconductors. 

Nexperia

11. Waveforms

74ABT00

Quad 2-input NAND gate

9,

Q$Q%LQSXW

*1'

92+

Q<RXWSXW

92/

90

W3+/

90

W3/+

PQD

Fig 6.

VM = 1.5 V

VOL and VOH are typical output voltage levels that occur with the output load.

Propagation delay input (nA, nB) to output (nY) and output skew time

9,

QHJDWLYH

SXOVH



9

9,

SRVLWLYH

SXOVH

9



90



WI

WU



90

W:



90



WU

WI



90



W:

DDL

9,

*

9&&

92

'87

57

a. Input pulse definition

b. Test circuit

Fig 7.

Test data is given in Table 8.

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

RT = Termination resistance should be equal to output impedance Zo of the pulse generator.

VEXT = External voltage for measuring switching times.

Test circuit for measuring switching times

9(;7

5/

&/

5/

PQD

Table 8.

Input

VI

3.0 V

Test data

fi

1 MHz

tW

500 ns

tr, tf

 2.5 ns

Load

CL

50 pF

RL

500 

VEXT

tPHL, tPLH

open

74ABT00

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 3 — 11 August 2016

© Nexperia B.V. 2017. All rights reserved

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