74HC175 데이터 시트보기 (PDF) - NXP Semiconductors.
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74HC175 Datasheet PDF : 19 Pages
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NXP Semiconductors
74HC175; 74HCT175
Quad D-type flip-flop with reset; positive-edge trigger
Table 7. Dynamic characteristics …continued
GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit, see Figure 11
Symbol Parameter
Conditions
25 C
40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max
Min
Max
th
hold time
Dn to CP; see Figure 8
VCC = 2.0 V
25 2 - 30
-
VCC = 4.5 V
50- 6
-
VCC = 6.0 V
40- 5
-
fmax
maximum
frequency
CP input; see Figure 8
VCC = 2.0 V
6 25 - 4.8
-
VCC = 4.5 V
30 75 - 24
-
VCC = 5 V; CL = 15 pF
- 83
-
--
VCC = 6.0 V
35 89 - 28
-
CPD
power
per package;
dissipation
VI = GND to VCC
capacitance
[3] -
32 -
-
-
40
-
8
-
7
-
4
-
20
-
-
-
24
-
-
-
ns
ns
ns
MHz
MHz
MHz
MHz
pF
74HCT175
tpd
propagation
CP to Qn, Qn;
[1]
delay
see Figure 8
VCC = 4.5 V
VCC = 5 V; CL = 15 pF
tPHL
HIGH to LOW MR to Qn; see Figure 10
propagation
delay
VCC = 4.5 V
VCC = 5 V; CL = 15 pF
MR to Qn; see Figure 10
- 19 33 -
- 16 - -
- 22 38 -
- 19 - -
41
-
-
-
48
-
-
-
50
ns
-
ns
57
ns
-
ns
VCC = 4.5 V
- 19 35 -
44
-
53
ns
VCC = 5 V; CL = 15 pF
- 16 - -
-
-
-
ns
tt
transition time Qn output; see Figure 8 [2]
VCC = 4.5 V
- 7 15 -
19
-
22
ns
tW
pulse width
CP input; see Figure 8
VCC = 4.5 V
20 12 - 25
-
30
-
ns
MR input LOW;
see Figure 10
VCC = 4.5 V
20 11 - 25
-
30
-
ns
trec
recovery time MR to CP; see Figure 10
VCC = 4.5 V
5 10 - 5
-
5
-
ns
tsu
set-up time
Dn to CP; see Figure 8
VCC = 4.5 V
16 5 - 20
-
24
-
ns
th
hold time
Dn to CP; see Figure 8
VCC = 4.5 V
50- 5
-
5
-
ns
74HC_HCT175
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 8 April 2014
© NXP Semiconductors N.V. 2014. All rights reserved.
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