74LV595D 데이터 시트보기 (PDF) - NXP Semiconductors.
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74LV595D Datasheet PDF : 20 Pages
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NXP Semiconductors
74LV595
8-bit serial-in/serial-out or parallel-out shift register; 3-state
6. Pinning information
6.1 Pinning
74LV595
Q1 1
Q2 2
Q3 3
Q4 4
Q5 5
Q6 6
Q7 7
GND 8
16 VCC
15 Q0
14 DS
13 OE
12 STCP
11 SHCP
10 MR
9 Q7S
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Fig 6. Pin configuration DIP16, SO16
74LV595
Q1 1
Q2 2
Q3 3
Q4 4
Q5 5
Q6 6
Q7 7
GND 8
16 VCC
15 Q0
14 DS
13 OE
12 STCP
11 SHCP
10 MR
9 Q7S
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Fig 7. Pin configuration SSOP16, TSSOP16
6.2 Pin description
Table 2. Pin description
Symbol
Pin
Description
Q0 to Q7
15, 1, 2, 3, 4, 5, 6, 7 parallel data output
GND
8
ground (0 V)
Q7S
9
serial data output
MR
10
master reset (active LOW)
SHCP
11
shift register clock input
STCP
12
storage register clock input
OE
13
output enable input (active LOW)
DS
14
serial data input
VCC
16
supply voltage
74LV595_3
Product data sheet
Rev. 03 — 21 April 2009
© NXP B.V. 2009. All rights reserved.
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