74HCT4046AD 데이터 시트보기 (PDF) - NXP Semiconductors.

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74HCT4046AD

Phase-locked loop with VCO

NXP Semiconductors. 

Nexperia

VCC

VDEM_OUT

(V)

1/2 VCC

74HC4046A; 74HCT4046A

Phase-locked loop with VCO

0

-2π

0

ØDEM_OUT(rad)

2π

aaa-020208

Fig. 9. Phase comparator 2; average output voltage as a function of input phase

difference

SIG_IN

COMP_IN

VCO_OUT

PC2_OUT

high impedance OFF - state

VCC

GND

VCO_IN

PCP_OUT

aaa-020209

Fig. 10. Typical waveforms for PLL using phase comparator 2; loop-locked at f0

8.2.3. Phase Comparator 3 (PC3)

PC3 is a positive edge-triggered sequential phase detector using an RS-type flip-flop. When the

PLL is using this comparator, positive signal transitions control the loop and the duty factors of

SIG_IN and COMP_IN are not important. The transfer characteristic of PC3, assuming ripple

(fr = fi) is suppressed, is:

where:

• VDEM_OUT is the demodulator output at pin DEM_OUT

• VDEM_OUT = VPC3_OUT (via low-pass filter)

The phase comparator gain is:

74HC_HCT4046A

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 4 — 6 August 2019

© Nexperia B.V. 2019. All rights reserved

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