HEF4017BP 데이터 시트보기 (PDF) - NXP Semiconductors.
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HEF4017BP Datasheet PDF : 16 Pages
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NXP Semiconductors
HEF4017B
5-stage Johnson decade counter
Table 8. Dynamic power dissipation PD
PD can be calculated from the formulas shown. VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C.
Symbol Parameter
VDD
Typical formula for PD (µW)
where:
PD
dynamic power 5 V
PD = 500 × fi + Σ(fo × CL) × VDD2
fi = input frequency in MHz;
dissipation
10 V
PD = 2200 × fi + Σ(fo × CL) × VDD2
fo = output frequency in MHz;
15 V
PD = 6000 × fi + Σ(fo × CL) × VDD2
CL = output load capacitance in pF;
VDD = supply voltage in V;
Σ(CL × fo) = sum of the outputs.
12. Waveforms
VI
CP0 input
VM
VSS
VI
CP1 input
VSS
VOH
Q1 - Q9
output
VOL
VOH
Q0, Q5 - Q9
output
VOL
VM
tPHL
VM
tPLH
VM
tTLH
tPLH
tPHL
tTHL
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Fig 7.
Conditions: CP1 = LOW, while CP0 triggers on a LOW-to-HIGH transition. CP1 triggers on a HIGH-to-LOW transition;
The shaded areas indicate where the output state is set by the input count.
Measurement points given in Table 9.
Waveforms showing the propagation delays for CP0, CP1 to Qn, Q5-9 outputs and the output transition
times
HEF4017B_4
Product data sheet
Rev. 04 — 9 December 2008
© NXP B.V. 2008. All rights reserved.
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