ADuM1510
When VDD2 is above a value of approximately 2 V, each channel
output takes on a state matching that of its respective input.
Between the values of 1 V and 2 V, the outputs are set low. This
behavior is shown in Figure 15 and Figure 16.
OUTPUT HIGH
~2V
~1V
V DD2
V
DD2
Figure 15. VDD2 Power-Up/Power-Down Characteristics, Input Data = High
Data Sheet
OUTPUT LOW
~2V
~1V
V DD2
V
DD2
Figure 16. VDD2 Power-Up/Power-Down Characteristics, Input Data = Low
Rev. D | Page 10 of 12