24C128 데이터 시트보기 (PDF) - ON Semiconductor

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24C128

128 kb I2C CMOS Serial EEPROM

ON Semiconductor 

CAT24C128

SCL

SDA

START

CONDITION

Figure 2. START/STOP Conditions

STOP

CONDITION

DEVICE ADDRESS

1

0

1

0 A2 A1 A0 R/W

Figure 3. Slave Address Bits

SCL FROM

MASTER

BUS RELEASE DELAY (TRANSMITTER)

1

8

BUS RELEASE DELAY (RECEIVER)

9

DATA OUTPUT

FROM TRANSMITTER

DATA OUTPUT

FROM RECEIVER

START

ACK DELAY (≤ tAA)

Figure 4. Acknowledge Timing

ACK SETUP (≥ tSU:DAT)

tF

tHIGH

tR

tLOW

tLOW

SCL

tSU:STA

tHD:STA

tHD:DAT

tSU:DAT

SDA IN

SDA OUT

tAA

tDH

Figure 5. Bus Timing

tSU:STO

tBUF

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