WM8804GEDS 데이터 시트보기 (PDF) - Cirrus Logic

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WM8804GEDS

1:1 Digital Interface Transceiver with PLL

Cirrus Logic 

Production Data

CONTROL INTERFACE – 3-WIRE MODE

WM8804

Figure 4 Control Interface Timing – 3-Wire Serial Control Mode

Test Conditions

PVDD = 3.3V, DVDD = 3.3V, PGND = 0V, DGND = 0V, TA = +25oC, fs = 48kHz, MCLK = 256fs unless stated.

PARAMETER

SYMBOL

MIN

TYP

MAX

Program Register Input Information

SCLK rising edge to CSB rising edge

tSCS

60

SCLK cycle time

tSCY

80

SCLK duty cycle

40/60

60/40

SDIN to SCLK set-up time

tDSU

20

SDIN hold time from SCLK rising edge

tDHO

20

SDOUT propagation delay from SCLK rising edge

tDL

5

CSB pulse width high

tCSH

20

CSB rising/falling to SCLK rising

tCSS

20

SCLK glitch suppression

tps

2

8

Table 4 Control Interface Timing – 3-Wire Serial Control Mode

UNIT

ns

ns

%

ns

ns

ns

ns

ns

ns

w

PD Rev 4.1 September 2007

9

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